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ELFObjectWriter: Replace Ctx.reportError with reportError
Prepare for removing MCContext from getRelocType functions.
1 parent 0e80be8 commit 068868d

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9 files changed

+121
-132
lines changed

9 files changed

+121
-132
lines changed

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp

Lines changed: 61 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,9 @@ class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
4040
const MCFixup &Fixup, bool IsPCRel) const override;
4141
bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
4242
unsigned Type) const override;
43+
bool isNonILP32reloc(const MCFixup &Fixup, AArch64MCExpr::Specifier RefKind,
44+
MCContext &Ctx) const;
45+
4346
bool IsILP32;
4447
};
4548

@@ -54,8 +57,9 @@ AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)
5457
IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
5558

5659
// assumes IsILP32 is true
57-
static bool isNonILP32reloc(const MCFixup &Fixup,
58-
AArch64MCExpr::Specifier RefKind, MCContext &Ctx) {
60+
bool AArch64ELFObjectWriter::isNonILP32reloc(const MCFixup &Fixup,
61+
AArch64MCExpr::Specifier RefKind,
62+
MCContext &Ctx) const {
5963
if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw)
6064
return false;
6165
switch (RefKind) {
@@ -71,8 +75,8 @@ static bool isNonILP32reloc(const MCFixup &Fixup,
7175
case AArch64MCExpr::VK_TPREL_G1_NC:
7276
case AArch64MCExpr::VK_GOTTPREL_G1:
7377
case AArch64MCExpr::VK_GOTTPREL_G0_NC:
74-
Ctx.reportError(Fixup.getLoc(),
75-
"absolute MOV relocation is not supported in ILP32");
78+
reportError(Fixup.getLoc(),
79+
"absolute MOV relocation is not supported in ILP32");
7680
return true;
7781
default:
7882
return false;
@@ -111,7 +115,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
111115
if (IsPCRel) {
112116
switch (Kind) {
113117
case FK_Data_1:
114-
Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported");
118+
reportError(Fixup.getLoc(), "1-byte data relocations not supported");
115119
return ELF::R_AARCH64_NONE;
116120
case FK_Data_2:
117121
return R_CLS(PREL16);
@@ -123,32 +127,31 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
123127
}
124128
case FK_Data_8:
125129
if (IsILP32) {
126-
Ctx.reportError(Fixup.getLoc(), "8 byte PC relative data "
127-
"relocation is not supported in ILP32");
130+
reportError(Fixup.getLoc(), "8 byte PC relative data "
131+
"relocation is not supported in ILP32");
128132
return ELF::R_AARCH64_NONE;
129133
}
130134
return ELF::R_AARCH64_PREL64;
131135
case AArch64::fixup_aarch64_pcrel_adr_imm21:
132136
if (SymLoc == AArch64MCExpr::VK_GOT_AUTH) {
133137
if (IsILP32) {
134-
Ctx.reportError(Fixup.getLoc(),
135-
"ADR AUTH relocation is not supported in ILP32");
138+
reportError(Fixup.getLoc(),
139+
"ADR AUTH relocation is not supported in ILP32");
136140
return ELF::R_AARCH64_NONE;
137141
}
138142
return ELF::R_AARCH64_AUTH_GOT_ADR_PREL_LO21;
139143
}
140144
if (SymLoc != AArch64MCExpr::VK_ABS)
141-
Ctx.reportError(Fixup.getLoc(),
142-
"invalid symbol kind for ADR relocation");
145+
reportError(Fixup.getLoc(), "invalid symbol kind for ADR relocation");
143146
return R_CLS(ADR_PREL_LO21);
144147
case AArch64::fixup_aarch64_pcrel_adrp_imm21:
145148
if (SymLoc == AArch64MCExpr::VK_ABS && !IsNC)
146149
return R_CLS(ADR_PREL_PG_HI21);
147150
if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) {
148151
if (IsILP32) {
149-
Ctx.reportError(Fixup.getLoc(),
150-
"invalid fixup for 32-bit pcrel ADRP instruction "
151-
"VK_ABS VK_NC");
152+
reportError(Fixup.getLoc(),
153+
"invalid fixup for 32-bit pcrel ADRP instruction "
154+
"VK_ABS VK_NC");
152155
return ELF::R_AARCH64_NONE;
153156
}
154157
return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
@@ -157,8 +160,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
157160
return R_CLS(ADR_GOT_PAGE);
158161
if (SymLoc == AArch64MCExpr::VK_GOT_AUTH && !IsNC) {
159162
if (IsILP32) {
160-
Ctx.reportError(Fixup.getLoc(),
161-
"ADRP AUTH relocation is not supported in ILP32");
163+
reportError(Fixup.getLoc(),
164+
"ADRP AUTH relocation is not supported in ILP32");
162165
return ELF::R_AARCH64_NONE;
163166
}
164167
return ELF::R_AARCH64_AUTH_ADR_GOT_PAGE;
@@ -169,14 +172,13 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
169172
return R_CLS(TLSDESC_ADR_PAGE21);
170173
if (SymLoc == AArch64MCExpr::VK_TLSDESC_AUTH && !IsNC) {
171174
if (IsILP32) {
172-
Ctx.reportError(Fixup.getLoc(),
173-
"ADRP AUTH relocation is not supported in ILP32");
175+
reportError(Fixup.getLoc(),
176+
"ADRP AUTH relocation is not supported in ILP32");
174177
return ELF::R_AARCH64_NONE;
175178
}
176179
return ELF::R_AARCH64_AUTH_TLSDESC_ADR_PAGE21;
177180
}
178-
Ctx.reportError(Fixup.getLoc(),
179-
"invalid symbol kind for ADRP relocation");
181+
reportError(Fixup.getLoc(), "invalid symbol kind for ADRP relocation");
180182
return ELF::R_AARCH64_NONE;
181183
case AArch64::fixup_aarch64_pcrel_branch26:
182184
return R_CLS(JUMP26);
@@ -189,8 +191,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
189191
return R_CLS(GOT_LD_PREL19);
190192
if (SymLoc == AArch64MCExpr::VK_GOT_AUTH) {
191193
if (IsILP32) {
192-
Ctx.reportError(Fixup.getLoc(),
193-
"LDR AUTH relocation is not supported in ILP32");
194+
reportError(Fixup.getLoc(),
195+
"LDR AUTH relocation is not supported in ILP32");
194196
return ELF::R_AARCH64_NONE;
195197
}
196198
return ELF::R_AARCH64_AUTH_GOT_LD_PREL19;
@@ -199,26 +201,26 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
199201
case AArch64::fixup_aarch64_pcrel_branch14:
200202
return R_CLS(TSTBR14);
201203
case AArch64::fixup_aarch64_pcrel_branch16:
202-
Ctx.reportError(Fixup.getLoc(),
203-
"relocation of PAC/AUT instructions is not supported");
204+
reportError(Fixup.getLoc(),
205+
"relocation of PAC/AUT instructions is not supported");
204206
return ELF::R_AARCH64_NONE;
205207
case AArch64::fixup_aarch64_pcrel_branch9:
206-
Ctx.reportError(
208+
reportError(
207209
Fixup.getLoc(),
208210
"relocation of compare-and-branch instructions not supported");
209211
return ELF::R_AARCH64_NONE;
210212
case AArch64::fixup_aarch64_pcrel_branch19:
211213
return R_CLS(CONDBR19);
212214
default:
213-
Ctx.reportError(Fixup.getLoc(), "Unsupported pc-relative fixup kind");
215+
reportError(Fixup.getLoc(), "Unsupported pc-relative fixup kind");
214216
return ELF::R_AARCH64_NONE;
215217
}
216218
} else {
217219
if (IsILP32 && isNonILP32reloc(Fixup, RefKind, Ctx))
218220
return ELF::R_AARCH64_NONE;
219221
switch (Fixup.getTargetKind()) {
220222
case FK_Data_1:
221-
Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported");
223+
reportError(Fixup.getLoc(), "1-byte data relocations not supported");
222224
return ELF::R_AARCH64_NONE;
223225
case FK_Data_2:
224226
return R_CLS(ABS16);
@@ -229,7 +231,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
229231
: R_CLS(ABS32);
230232
case FK_Data_8: {
231233
if (IsILP32) {
232-
Ctx.reportError(
234+
reportError(
233235
Fixup.getLoc(),
234236
"8 byte absolute data relocation is not supported in ILP32");
235237
return ELF::R_AARCH64_NONE;
@@ -256,25 +258,24 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
256258
return R_CLS(TLSDESC_ADD_LO12);
257259
if (RefKind == AArch64MCExpr::VK_TLSDESC_AUTH_LO12) {
258260
if (IsILP32) {
259-
Ctx.reportError(Fixup.getLoc(),
260-
"ADD AUTH relocation is not supported in ILP32");
261+
reportError(Fixup.getLoc(),
262+
"ADD AUTH relocation is not supported in ILP32");
261263
return ELF::R_AARCH64_NONE;
262264
}
263265
return ELF::R_AARCH64_AUTH_TLSDESC_ADD_LO12;
264266
}
265267
if (RefKind == AArch64MCExpr::VK_GOT_AUTH_LO12 && IsNC) {
266268
if (IsILP32) {
267-
Ctx.reportError(Fixup.getLoc(),
268-
"ADD AUTH relocation is not supported in ILP32");
269+
reportError(Fixup.getLoc(),
270+
"ADD AUTH relocation is not supported in ILP32");
269271
return ELF::R_AARCH64_NONE;
270272
}
271273
return ELF::R_AARCH64_AUTH_GOT_ADD_LO12_NC;
272274
}
273275
if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
274276
return R_CLS(ADD_ABS_LO12_NC);
275277

276-
Ctx.reportError(Fixup.getLoc(),
277-
"invalid fixup for add (uimm12) instruction");
278+
reportError(Fixup.getLoc(), "invalid fixup for add (uimm12) instruction");
278279
return ELF::R_AARCH64_NONE;
279280
case AArch64::fixup_aarch64_ldst_imm12_scale1:
280281
if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
@@ -288,8 +289,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
288289
if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
289290
return R_CLS(TLSLE_LDST8_TPREL_LO12_NC);
290291

291-
Ctx.reportError(Fixup.getLoc(),
292-
"invalid fixup for 8-bit load/store instruction");
292+
reportError(Fixup.getLoc(),
293+
"invalid fixup for 8-bit load/store instruction");
293294
return ELF::R_AARCH64_NONE;
294295
case AArch64::fixup_aarch64_ldst_imm12_scale2:
295296
if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
@@ -303,8 +304,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
303304
if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
304305
return R_CLS(TLSLE_LDST16_TPREL_LO12_NC);
305306

306-
Ctx.reportError(Fixup.getLoc(),
307-
"invalid fixup for 16-bit load/store instruction");
307+
reportError(Fixup.getLoc(),
308+
"invalid fixup for 16-bit load/store instruction");
308309
return ELF::R_AARCH64_NONE;
309310
case AArch64::fixup_aarch64_ldst_imm12_scale4:
310311
if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
@@ -320,13 +321,13 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
320321
if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
321322
if (IsILP32)
322323
return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
323-
Ctx.reportError(Fixup.getLoc(), "4 byte unchecked GOT load/store "
324-
"relocation is not supported in LP64");
324+
reportError(Fixup.getLoc(), "4 byte unchecked GOT load/store "
325+
"relocation is not supported in LP64");
325326
return ELF::R_AARCH64_NONE;
326327
}
327328
if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC) {
328329
if (IsILP32) {
329-
Ctx.reportError(
330+
reportError(
330331
Fixup.getLoc(),
331332
"4 byte checked GOT load/store relocation is not supported");
332333
}
@@ -335,22 +336,22 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
335336
if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
336337
if (IsILP32)
337338
return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
338-
Ctx.reportError(Fixup.getLoc(), "32-bit load/store "
339-
"relocation is not supported in LP64");
339+
reportError(Fixup.getLoc(), "32-bit load/store "
340+
"relocation is not supported in LP64");
340341
return ELF::R_AARCH64_NONE;
341342
}
342343
if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) {
343344
if (IsILP32)
344345
return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
345-
Ctx.reportError(
346+
reportError(
346347
Fixup.getLoc(),
347348
"4 byte TLSDESC load/store relocation is not supported in LP64");
348349
return ELF::R_AARCH64_NONE;
349350
}
350351

351-
Ctx.reportError(Fixup.getLoc(),
352-
"invalid fixup for 32-bit load/store instruction "
353-
"fixup_aarch64_ldst_imm12_scale4");
352+
reportError(Fixup.getLoc(),
353+
"invalid fixup for 32-bit load/store instruction "
354+
"fixup_aarch64_ldst_imm12_scale4");
354355
return ELF::R_AARCH64_NONE;
355356
case AArch64::fixup_aarch64_ldst_imm12_scale8:
356357
if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
@@ -367,9 +368,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
367368
return (IsAuth ? ELF::R_AARCH64_AUTH_LD64_GOT_LO12_NC
368369
: ELF::R_AARCH64_LD64_GOT_LO12_NC);
369370
}
370-
Ctx.reportError(
371-
Fixup.getLoc(),
372-
"64-bit load/store relocation is not supported in ILP32");
371+
reportError(Fixup.getLoc(),
372+
"64-bit load/store relocation is not supported in ILP32");
373373
return ELF::R_AARCH64_NONE;
374374
}
375375
if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
@@ -383,29 +383,27 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
383383
if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
384384
if (!IsILP32)
385385
return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
386-
Ctx.reportError(
387-
Fixup.getLoc(),
388-
"64-bit load/store relocation is not supported in ILP32");
386+
reportError(Fixup.getLoc(),
387+
"64-bit load/store relocation is not supported in ILP32");
389388
return ELF::R_AARCH64_NONE;
390389
}
391390
if (SymLoc == AArch64MCExpr::VK_TLSDESC) {
392391
if (!IsILP32)
393392
return ELF::R_AARCH64_TLSDESC_LD64_LO12;
394-
Ctx.reportError(
395-
Fixup.getLoc(),
396-
"64-bit load/store relocation is not supported in ILP32");
393+
reportError(Fixup.getLoc(),
394+
"64-bit load/store relocation is not supported in ILP32");
397395
return ELF::R_AARCH64_NONE;
398396
}
399397
if (SymLoc == AArch64MCExpr::VK_TLSDESC_AUTH) {
400398
if (!IsILP32)
401399
return ELF::R_AARCH64_AUTH_TLSDESC_LD64_LO12;
402-
Ctx.reportError(
400+
reportError(
403401
Fixup.getLoc(),
404402
"64-bit load/store AUTH relocation is not supported in ILP32");
405403
return ELF::R_AARCH64_NONE;
406404
}
407-
Ctx.reportError(Fixup.getLoc(),
408-
"invalid fixup for 64-bit load/store instruction");
405+
reportError(Fixup.getLoc(),
406+
"invalid fixup for 64-bit load/store instruction");
409407
return ELF::R_AARCH64_NONE;
410408
case AArch64::fixup_aarch64_ldst_imm12_scale16:
411409
if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
@@ -419,8 +417,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
419417
if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
420418
return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
421419

422-
Ctx.reportError(Fixup.getLoc(),
423-
"invalid fixup for 128-bit load/store instruction");
420+
reportError(Fixup.getLoc(),
421+
"invalid fixup for 128-bit load/store instruction");
424422
return ELF::R_AARCH64_NONE;
425423
// ILP32 case not reached here, tested with isNonILP32reloc
426424
case AArch64::fixup_aarch64_movw:
@@ -482,11 +480,10 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
482480
return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
483481
if (RefKind == AArch64MCExpr::VK_GOTTPREL_G0_NC)
484482
return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
485-
Ctx.reportError(Fixup.getLoc(),
486-
"invalid fixup for movz/movk instruction");
483+
reportError(Fixup.getLoc(), "invalid fixup for movz/movk instruction");
487484
return ELF::R_AARCH64_NONE;
488485
default:
489-
Ctx.reportError(Fixup.getLoc(), "Unknown ELF relocation type");
486+
reportError(Fixup.getLoc(), "Unknown ELF relocation type");
490487
return ELF::R_AARCH64_NONE;
491488
}
492489
}

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -84,8 +84,8 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
8484
assert(SymA);
8585

8686
if (SymA->isUndefined()) {
87-
Ctx.reportError(Fixup.getLoc(),
88-
Twine("undefined label '") + SymA->getName() + "'");
87+
reportError(Fixup.getLoc(),
88+
Twine("undefined label '") + SymA->getName() + "'");
8989
return ELF::R_AMDGPU_NONE;
9090
}
9191
return ELF::R_AMDGPU_REL16;

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