Update llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

carlobertolli · rampitec · carlobertolli · commit 06ca6797be5b · 2025-10-13T14:25:14.000-05:00
SReg_64 is part of SReg_64_EncodableRegClass.

Co-authored-by: Stanislav Mekhanoshin &lt;rampitec.github@runbox.com&gt;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -899,8 +899,7 @@ void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
     }
 
     if (DestReg == AMDGPU::VCC) {
-      if (AMDGPU::SReg_64RegClass.contains(SrcReg) ||
-      AMDGPU::SReg_64_EncodableRegClass.contains(SrcReg)) {
+      if (AMDGPU::SReg_64_EncodableRegClass.contains(SrcReg)) {
         BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
           .addReg(SrcReg, getKillRegState(KillSrc));
       } else {

Original file line number	Diff line number	Diff line change
`@@ -899,8 +899,7 @@ void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,`
`899`	`899`	`}`
`900`	`900`
`901`	`901`	`if (DestReg == AMDGPU::VCC) {`
`902`		`- if (AMDGPU::SReg_64RegClass.contains(SrcReg) \|\|`
`903`		`- AMDGPU::SReg_64_EncodableRegClass.contains(SrcReg)) {`
	`902`	`+ if (AMDGPU::SReg_64_EncodableRegClass.contains(SrcReg)) {`
`904`	`903`	`BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)`
`905`	`904`	`.addReg(SrcReg, getKillRegState(KillSrc));`
`906`	`905`	`} else {`