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[TableGen] Add a backend generating SDNode descriptions
This patch adds a simplistic backend that gathers all target-specific SelectionDAG nodes and emits descriptions for most of them. This includes generating node enumeration, node names, and information about node "prototype" that can be used to verify that a node is valid. The patch also extends SDNode by adding target-specific flags, which are also included in the generated tables. Part of #119709, [RFC](https://discourse.llvm.org/t/rfc-tablegen-erating-sdnode-descriptions/83627).
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‎llvm/include/llvm/Target/TargetSelectionDAG.td‎

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@@ -353,6 +353,8 @@ class SDNode<string opcode, SDTypeProfile typeprof,
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string SDClass = sdclass;
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let Properties = props;
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SDTypeProfile TypeProfile = typeprof;
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bit IsStrictFP = false;
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bits<64> TSFlags = 0;
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}
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// Special TableGen-recognized dag nodes

‎llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td‎

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// RUN: split-file %s %t
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//--- test1.td
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/test1.td | FileCheck %t/test1.td
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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def my_node_a : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
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def my_node_b : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, f32>]>>;
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// CHECK: enum GenNodeType : unsigned {
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// CHECK-NEXT: NODE = ISD::BUILTIN_OP_END,
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// CHECK-NEXT: };
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// CHECK: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "MyTargetISD::NODE\0"
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// CHECK-NEXT: "\0";
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// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: {1, 0, 0, 0, 0, 0, 0, 0}, // NODE
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
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//--- test2.td
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/test2.td | FileCheck %t/test2.td
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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def my_node_1a : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
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def my_node_1b : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
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def my_node_2a : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>>;
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def my_node_2b : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0, untyped>]>>;
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// CHECK: namespace llvm::MyTargetISD {
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// CHECK-EMPTY:
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// CHECK-NEXT: enum GenNodeType : unsigned {
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// CHECK-NEXT: NODE_1 = ISD::BUILTIN_OP_END,
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// CHECK-NEXT: NODE_2,
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE_2 + 1;
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm::MyTargetISD
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// CHECK: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "MyTargetISD::NODE_1\0"
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// CHECK-NEXT: "MyTargetISD::NODE_2\0"
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// CHECK-NEXT: "\0";
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// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* 0 */ {SDTCisVT, 0, 0, MVT::i32},
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: {1, 0, 0, 0, 0, 0, 0, 1}, // NODE_1
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// CHECK-NEXT: {1, 0, 0, 0, 0, 20, 0, 0}, // NODE_2
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/2, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);

‎llvm/test/TableGen/SDNodeInfoEmitter/basic.td‎

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// RUN: split-file %s %t
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//--- no-nodes.td
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/no-nodes.td \
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// RUN: | FileCheck %t/no-nodes.td
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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// CHECK: #ifdef GET_SDNODE_ENUM
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// CHECK-NEXT: #undef GET_SDNODE_ENUM
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// CHECK-EMPTY:
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// CHECK-NEXT: namespace llvm::MyTargetISD {
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// CHECK-EMPTY:
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// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm::MyTargetISD
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// CHECK-EMPTY:
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// CHECK-NEXT: #endif // GET_SDNODE_ENUM
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// CHECK-EMPTY:
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// CHECK-NEXT: #ifdef GET_SDNODE_DESC
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// CHECK-NEXT: #undef GET_SDNODE_DESC
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// CHECK-EMPTY:
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// CHECK-NEXT: namespace llvm {
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// CHECK-EMPTY:
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// CHECK-NEXT: #ifdef __GNUC__
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// CHECK-NEXT: #pragma GCC diagnostic push
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// CHECK-NEXT: #pragma GCC diagnostic ignored "-Woverlength-strings"
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// CHECK-NEXT: #endif
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// CHECK-NEXT: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "\0";
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// CHECK-NEXT: #ifdef __GNUC__
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// CHECK-NEXT: #pragma GCC diagnostic pop
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// CHECK-NEXT: #endif
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/0, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm
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//--- trivial-node.td
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/trivial-node.td \
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// RUN: | FileCheck %t/trivial-node.td
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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def my_noop : SDNode<"MyTargetISD::NOOP", SDTypeProfile<0, 0, []>>;
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// CHECK: namespace llvm::MyTargetISD {
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// CHECK-EMPTY:
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// CHECK-NEXT: enum GenNodeType : unsigned {
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// CHECK-NEXT: NOOP = ISD::BUILTIN_OP_END,
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NOOP + 1;
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm::MyTargetISD
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// CHECK: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "MyTargetISD::NOOP\0"
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// CHECK-NEXT: "\0";
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// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: {0, 0, 0, 0, 0, 0, 0, 0}, // NOOP
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);

‎llvm/test/TableGen/SDNodeInfoEmitter/namespace.td‎

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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s -sdnode-namespace=EmptyISD \
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// RUN: | FileCheck %s -check-prefix=EMPTY
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s \
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// RUN: | FileCheck %s --check-prefixes=COMMON,TARGET -DNS=MyTargetISD
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s -sdnode-namespace=MyCustomISD \
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// RUN: | FileCheck %s -check-prefixes=COMMON,CUSTOM -DNS=MyCustomISD
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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def node_1 : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i1>]>>;
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def node_2 : SDNode<"MyCustomISD::NODE", SDTypeProfile<0, 1, [SDTCisVT<0, i2>]>>;
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// EMPTY: namespace llvm::EmptyISD {
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// EMPTY-EMPTY:
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// EMPTY-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
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// EMPTY-EMPTY:
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// EMPTY-NEXT: } // namespace llvm::EmptyISD
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// EMPTY: static const char MyTargetSDNodeNames[] =
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// EMPTY-NEXT: "\0";
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// EMPTY: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// EMPTY-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
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// EMPTY-NEXT: };
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// EMPTY-EMPTY:
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// EMPTY-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// EMPTY-NEXT: };
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// EMPTY-EMPTY:
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// EMPTY-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// EMPTY-NEXT: /*NumOpcodes=*/0, MyTargetSDNodeDescs,
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// EMPTY-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
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// COMMON: namespace llvm::[[NS]] {
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// COMMON-EMPTY:
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// COMMON-NEXT: enum GenNodeType : unsigned {
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// COMMON-NEXT: NODE = ISD::BUILTIN_OP_END,
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// COMMON-NEXT: };
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// COMMON-EMPTY:
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// COMMON-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE + 1;
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// COMMON-EMPTY:
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// COMMON-NEXT: } // namespace llvm::[[NS]]
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// COMMON: static const char MyTargetSDNodeNames[] =
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// COMMON-NEXT: "[[NS]]::NODE\0"
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// COMMON-NEXT: "\0";
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// COMMON: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// TARGET-NEXT: /* 0 */ {SDTCisVT, 0, 0, MVT::i1},
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// CUSTOM-NEXT: /* 0 */ {SDTCisVT, 0, 0, MVT::i2},
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// COMMON-NEXT: };
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// COMMON-EMPTY:
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// COMMON-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// TARGET-NEXT: {1, 0, 0, 0, 0, 0, 0, 1}, // NODE
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// CUSTOM-NEXT: {0, 1, 0, 0, 0, 0, 0, 1}, // NODE
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// COMMON-NEXT: };
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// COMMON-EMPTY:
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// COMMON-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// COMMON-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
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// COMMON-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);

‎llvm/test/TableGen/SDNodeInfoEmitter/skipped-nodes.td‎

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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %s 2> %t.warn | FileCheck %s
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// RUN: FileCheck --check-prefix=WARN --implicit-check-not=warning %s < %t.warn
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// RUN: llvm-tblgen -gen-sd-node-info -warn-on-skipped-nodes=false \
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// RUN: -I %p/../../../include %s 2> %t.nowarn | FileCheck %s
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// RUN: not test -s %t.nowarn
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
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def bad_name_1 : SDNode<"", SDTypeProfile<0, 0, []>>;
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// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
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def bad_name_2 : SDNode<"NODE", SDTypeProfile<0, 0, []>>;
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// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
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def bad_name_3 : SDNode<"MyTargetISD::", SDTypeProfile<0, 0, []>>;
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// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
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def bad_name_4 : SDNode<"MyISD::", SDTypeProfile<0, 0, []>>;
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// WARN: [[#@LINE+1]]:5: warning: skipped node: invalid enum name
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def bad_name_5 : SDNode<"::NODE", SDTypeProfile<0, 0, []>>;
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// Standard namespace.
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def silent_1 : SDNode<"ISD::SILENT", SDTypeProfile<0, 0, []>>;
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// Different namespace.
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def silent_2 : SDNode<"MyISD::SILENT", SDTypeProfile<0, 0, []>>;
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// Different number of results.
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// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
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// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
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def node_1a : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<0, 0, []>>;
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def node_1b : SDNode<"MyTargetISD::NODE_1", SDTypeProfile<1, 0, []>>;
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// Different number of operands.
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// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
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// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
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def node_2a : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<0, 0, []>>;
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def node_2b : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<0, 1, []>>;
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// Different value of IsStrictFP.
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// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
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// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
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let IsStrictFP = true in
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def node_3a : SDNode<"MyTargetISD::NODE_3", SDTypeProfile<0, 0, []>>;
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def node_3b : SDNode<"MyTargetISD::NODE_3", SDTypeProfile<0, 0, []>>;
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// Different value of TSFlags.
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// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
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// WARN: [[#@LINE+3]]:5: warning: skipped node: incompatible description
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let TSFlags = 1 in
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def node_4a : SDNode<"MyTargetISD::NODE_4", SDTypeProfile<0, 0, []>>;
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def node_4b : SDNode<"MyTargetISD::NODE_4", SDTypeProfile<0, 0, []>>;
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// Different properties.
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// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
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// WARN: [[#@LINE+2]]:5: warning: skipped node: incompatible description
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def node_5a : SDNode<"MyTargetISD::NODE_5", SDTypeProfile<0, 0, []>>;
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def node_5b : SDNode<"MyTargetISD::NODE_5", SDTypeProfile<0, 0, []>, [SDNPHasChain]>;
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// CHECK: enum GenNodeType : unsigned {
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// CHECK-NEXT: COMPAT = ISD::BUILTIN_OP_END,
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// CHECK-NEXT: };
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// CHECK: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "MyTargetISD::COMPAT\0"
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// CHECK-NEXT: "\0";
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// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: {1, -1, 0, 0, 0, 0, 0, 0}, // COMPAT
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
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def compat_a : SDNode<"MyTargetISD::COMPAT", SDTypeProfile<1, -1, []>>;
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def compat_b : SDNode<"MyTargetISD::COMPAT", SDTypeProfile<1, -1, [SDTCisVT<0, untyped>]>>;
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def compat_c : SDNode<"MyTargetISD::COMPAT", SDTypeProfile<1, -1, [SDTCisVT<0, untyped>]>,
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[SDNPCommutative, SDNPAssociative, SDNPMayStore, SDNPMayLoad, SDNPSideEffect]>;

‎llvm/utils/TableGen/CMakeLists.txt‎

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@@ -60,6 +60,7 @@ add_tablegen(llvm-tblgen LLVM
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PseudoLoweringEmitter.cpp
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RegisterBankEmitter.cpp
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RegisterInfoEmitter.cpp
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SDNodeInfoEmitter.cpp
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SearchableTableEmitter.cpp
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SubtargetEmitter.cpp
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WebAssemblyDisassemblerEmitter.cpp

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