[gn] port 0ae2bcc more

nico · nico · commit 06f0d30e2887 · 2025-11-19T14:26:13.000-05:00
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
@@ -37,7 +37,10 @@ tablegen("ARMGenRegisterBank") {
 }
 
 tablegen("ARMGenSDNodeInfo") {
-  visibility = [ ":LLVMARMCodeGen" ]
+  visibility = [
+    ":LLVMARMCodeGen",
+    "//llvm/unittests/Target/ARM:ARMTests",
+  ]
   args = [ "-gen-sd-node-info" ]
   td_file = "ARM.td"
 }
diff --git a/llvm/utils/gn/secondary/llvm/unittests/Target/ARM/BUILD.gn b/llvm/utils/gn/secondary/llvm/unittests/Target/ARM/BUILD.gn
@@ -6,6 +6,7 @@ unittest("ARMTests") {
     "//llvm/lib/MC",
     "//llvm/lib/Support",
     "//llvm/lib/Target",
+    "//llvm/lib/Target/ARM:ARMGenSDNodeInfo",
     "//llvm/lib/Target/ARM:LLVMARMCodeGen",
     "//llvm/lib/Target/ARM/MCTargetDesc",
     "//llvm/lib/Target/ARM/TargetInfo",

Original file line number	Diff line number	Diff line change
`@@ -37,7 +37,10 @@ tablegen("ARMGenRegisterBank") {`
`37`	`37`	`}`
`38`	`38`
`39`	`39`	`tablegen("ARMGenSDNodeInfo") {`
`40`		`- visibility = [ ":LLVMARMCodeGen" ]`
	`40`	`+ visibility = [`
	`41`	`+ ":LLVMARMCodeGen",`
	`42`	`+ "//llvm/unittests/Target/ARM:ARMTests",`
	`43`	`+ ]`
`41`	`44`	`args = [ "-gen-sd-node-info" ]`
`42`	`45`	`td_file = "ARM.td"`
`43`	`46`	`}`