[SLP][REVEC] Pre-commit test.

Author: HanKuanChen

llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll

@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=riscv64 -mcpu=sifive-x280 -passes=slp-vectorizer -S -slp-revec -slp-max-reg-size=1024 -slp-threshold=-100 %s | FileCheck %s
+; RUN: opt -mtriple=riscv64 -mcpu=sifive-x280 -passes=slp-vectorizer -S -slp-revec -slp-max-reg-size=1024 -slp-threshold=-100 %s | FileCheck --check-prefixes=CHECK,POWEROF2 %s
+; RUN: opt -mtriple=riscv64 -mcpu=sifive-x280 -passes=slp-vectorizer -S -slp-revec -slp-max-reg-size=1024 -slp-threshold=-100 -slp-vectorize-non-power-of-2 %s | FileCheck --check-prefixes=CHECK,NONPOWEROF2 %s
 
 define i32 @test() {
 ; CHECK-LABEL: @test(
@@ -134,3 +135,41 @@ for.body:
   %6 = select <2 x i1> %4, <2 x float> %3, <2 x float> zeroinitializer
   br label %for.cond.cleanup
 }
+
+define ptr @test4() {
+  %1 = fadd <8 x float> zeroinitializer, zeroinitializer
+  %2 = extractelement <8 x float> %1, i64 0
+  %3 = extractelement <8 x float> %1, i64 1
+  %4 = extractelement <8 x float> %1, i64 2
+  %5 = extractelement <8 x float> %1, i64 4
+  %6 = extractelement <8 x float> %1, i64 5
+  %7 = extractelement <8 x float> %1, i64 6
+  br label %9
+
+8:
+  br label %9
+
+9:
+  %10 = phi float [ 0.000000e+00, %8 ], [ %7, %0 ]
+  %11 = phi float [ 0.000000e+00, %8 ], [ %6, %0 ]
+  %12 = phi float [ 0.000000e+00, %8 ], [ %5, %0 ]
+  %13 = phi float [ 0.000000e+00, %8 ], [ %4, %0 ]
+  %14 = phi float [ 0.000000e+00, %8 ], [ %3, %0 ]
+  %15 = phi float [ 0.000000e+00, %8 ], [ %2, %0 ]
+  br label %16
+
+16:
+  %17 = fmul float %14, 0.000000e+00
+  %18 = fmul float 0.000000e+00, %11
+  %19 = fmul float 0.000000e+00, %15
+  %20 = fmul float %12, 0.000000e+00
+  %21 = fadd reassoc nsz float %17, %19
+  %22 = fadd reassoc nsz float %18, %20
+  %23 = fmul float %13, 0.000000e+00
+  %24 = fmul float %10, 0.000000e+00
+  %25 = fadd reassoc nsz float %21, %23
+  %26 = fadd reassoc nsz float %22, %24
+  %27 = tail call float @llvm.sqrt.f32(float %25)
+  %28 = tail call float @llvm.sqrt.f32(float %26)
+  ret ptr null
+}