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3 files changed

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‎llvm/lib/Target/AMDGPU/SICustomBranchBundles.h‎

Lines changed: 144 additions & 148 deletions
Original file line numberDiff line numberDiff line change
@@ -17,233 +17,229 @@ using namespace llvm;
1717
using std::unordered_set;
1818
using std::vector;
1919

20-
static inline MachineInstr &get_branch_with_dest(MachineBasicBlock &branching_MBB,
21-
MachineBasicBlock &dest_MBB) {
22-
auto& TII = *branching_MBB.getParent()->getSubtarget<GCNSubtarget>().getInstrInfo();
23-
for (MachineInstr &branch_MI : reverse(branching_MBB.instrs()))
24-
if (branch_MI.isBranch() && TII.getBranchDestBlock(branch_MI) == &dest_MBB)
25-
return branch_MI;
20+
static inline MachineInstr &getBranchWithDest(MachineBasicBlock &BranchingMBB,
21+
MachineBasicBlock &DestMBB) {
22+
auto &TII =
23+
*BranchingMBB.getParent()->getSubtarget<GCNSubtarget>().getInstrInfo();
24+
for (MachineInstr &BranchMI : reverse(BranchingMBB.instrs()))
25+
if (BranchMI.isBranch() && TII.getBranchDestBlock(BranchMI) == &DestMBB)
26+
return BranchMI;
2627

2728
llvm_unreachable("Don't call this if there's no branch to the destination.");
2829
}
2930

30-
static inline void move_ins_before_phis(MachineInstr &MI) {
31-
MachineBasicBlock& MBB = *MI.getParent();
32-
MachineFunction& MF = *MBB.getParent();
31+
static inline void moveInsBeforePhis(MachineInstr &MI) {
32+
MachineBasicBlock &MBB = *MI.getParent();
33+
MachineFunction &MF = *MBB.getParent();
3334
auto &TII = *MF.getSubtarget<GCNSubtarget>().getInstrInfo();
34-
auto& MRI = MF.getRegInfo();
35+
auto &MRI = MF.getRegInfo();
3536

36-
bool phi_seen = false;
37-
MachineBasicBlock::iterator first_phi;
38-
for (first_phi = MBB.begin(); first_phi != MBB.end(); first_phi++)
39-
if (first_phi->getOpcode() == AMDGPU::PHI) {
40-
phi_seen = true;
37+
bool PhiSeen = false;
38+
MachineBasicBlock::iterator FirstPhi;
39+
for (FirstPhi = MBB.begin(); FirstPhi != MBB.end(); FirstPhi++)
40+
if (FirstPhi->getOpcode() == AMDGPU::PHI) {
41+
PhiSeen = true;
4142
break;
4243
}
43-
44-
if (!phi_seen) {
44+
45+
if (!PhiSeen) {
4546
MI.removeFromParent();
4647
MBB.insert(MBB.begin(), &MI);
4748
} else {
48-
auto phi = BuildMI(MBB, first_phi, MI.getDebugLoc(), TII.get(AMDGPU::PHI),
49-
MI.getOperand(0).getReg());
50-
for (auto *pred_MBB : MBB.predecessors()) {
51-
Register cloned_reg = MRI.cloneVirtualRegister(MI.getOperand(0).getReg());
52-
MachineInstr& branch_MI = get_branch_with_dest(*pred_MBB,MBB);
53-
MachineInstr *cloned_MI = MF.CloneMachineInstr(&MI);
54-
cloned_MI->getOperand(0).setReg(cloned_reg);
55-
phi.addReg(cloned_reg).addMBB(pred_MBB);
56-
pred_MBB->insertAfterBundle(branch_MI.getIterator(), cloned_MI);
57-
cloned_MI->bundleWithPred();
49+
auto Phi = BuildMI(MBB, FirstPhi, MI.getDebugLoc(), TII.get(AMDGPU::PHI),
50+
MI.getOperand(0).getReg());
51+
for (auto *PredMBB : MBB.predecessors()) {
52+
Register ClonedReg = MRI.cloneVirtualRegister(MI.getOperand(0).getReg());
53+
MachineInstr &BranchMI = getBranchWithDest(*PredMBB, MBB);
54+
MachineInstr *ClonedMI = MF.CloneMachineInstr(&MI);
55+
ClonedMI->getOperand(0).setReg(ClonedReg);
56+
Phi.addReg(ClonedReg).addMBB(PredMBB);
57+
PredMBB->insertAfterBundle(BranchMI.getIterator(), ClonedMI);
58+
ClonedMI->bundleWithPred();
5859
}
5960
MI.eraseFromParent();
6061
}
6162
}
6263

63-
struct Epilog_Iterator {
64-
MachineBasicBlock::instr_iterator internal_it;
65-
Epilog_Iterator(MachineBasicBlock::instr_iterator i) : internal_it(i) {}
64+
struct EpilogIterator {
65+
MachineBasicBlock::instr_iterator InternalIt;
66+
EpilogIterator(MachineBasicBlock::instr_iterator I) : InternalIt(I) {}
6667

67-
bool operator==(const Epilog_Iterator &other) {
68-
return internal_it == other.internal_it;
68+
bool operator==(const EpilogIterator &Other) {
69+
return InternalIt == Other.InternalIt;
6970
}
70-
bool isEnd() { return internal_it.isEnd(); }
71-
MachineInstr &operator*() { return *internal_it; }
72-
MachineBasicBlock::instr_iterator operator->() { return internal_it; }
73-
Epilog_Iterator &operator++() {
74-
++internal_it;
75-
if (!internal_it.isEnd() && internal_it->isBranch())
76-
internal_it = internal_it->getParent()->instr_end();
71+
bool isEnd() { return InternalIt.isEnd(); }
72+
MachineInstr &operator*() { return *InternalIt; }
73+
MachineBasicBlock::instr_iterator operator->() { return InternalIt; }
74+
EpilogIterator &operator++() {
75+
++InternalIt;
76+
if (!InternalIt.isEnd() && InternalIt->isBranch())
77+
InternalIt = InternalIt->getParent()->instr_end();
7778
return *this;
7879
}
79-
Epilog_Iterator operator++(int ignored) {
80-
Epilog_Iterator to_return = *this;
80+
EpilogIterator operator++(int Ignored) {
81+
EpilogIterator ToReturn = *this;
8182
++*this;
82-
return to_return;
83+
return ToReturn;
8384
}
84-
8585
};
8686

87-
static inline Epilog_Iterator
88-
get_epilog_for_successor(MachineBasicBlock& pred_MBB, MachineBasicBlock& succ_MBB) {
89-
MachineFunction& MF = *pred_MBB.getParent();
90-
auto& TII = *MF.getSubtarget<GCNSubtarget>().getInstrInfo();
87+
static inline EpilogIterator getEpilogForSuccessor(MachineBasicBlock &PredMBB,
88+
MachineBasicBlock &SuccMBB) {
89+
MachineFunction &MF = *PredMBB.getParent();
90+
auto &TII = *MF.getSubtarget<GCNSubtarget>().getInstrInfo();
9191

92-
for (MachineInstr &branch_MI : reverse(pred_MBB.instrs()))
93-
if (branch_MI.isBranch() && TII.getBranchDestBlock(branch_MI) == &succ_MBB)
94-
return ++Epilog_Iterator(branch_MI.getIterator());
92+
for (MachineInstr &BranchMI : reverse(PredMBB.instrs()))
93+
if (BranchMI.isBranch() && TII.getBranchDestBlock(BranchMI) == &SuccMBB)
94+
return ++EpilogIterator(BranchMI.getIterator());
9595

9696
llvm_unreachable("There should always be a branch to succ_MBB.");
9797
}
9898

99-
static inline bool epilogs_are_identical(const vector<MachineInstr *> left,
100-
const vector<MachineInstr *> right,
101-
const MachineBasicBlock &succ_MBB) {
102-
if (left.size() != right.size())
99+
static inline bool epilogsAreIdentical(const vector<MachineInstr *> Left,
100+
const vector<MachineInstr *> Right,
101+
const MachineBasicBlock &SuccMBB) {
102+
if (Left.size() != Right.size())
103103
return false;
104-
105-
for (unsigned i = 0; i < left.size(); i++)
106-
if (!left[i]->isIdenticalTo(*right[i]))
104+
105+
for (unsigned I = 0; I < Left.size(); I++)
106+
if (!Left[I]->isIdenticalTo(*Right[I]))
107107
return false;
108108
return true;
109109
}
110110

111-
static inline void move_body(vector<MachineInstr *> &body,
112-
MachineBasicBlock &dest_MBB) {
113-
for (auto rev_it = body.rbegin(); rev_it != body.rend(); rev_it++) {
114-
MachineInstr &body_ins = **rev_it;
115-
body_ins.removeFromBundle();
116-
dest_MBB.insert(dest_MBB.begin(), &body_ins);
111+
static inline void moveBody(vector<MachineInstr *> &Body,
112+
MachineBasicBlock &DestMBB) {
113+
for (auto RevIt = Body.rbegin(); RevIt != Body.rend(); RevIt++) {
114+
MachineInstr &BodyIns = **RevIt;
115+
BodyIns.removeFromBundle();
116+
DestMBB.insert(DestMBB.begin(), &BodyIns);
117117
}
118118
}
119119

120-
static inline void normalize_ir_post_phi_elimination(MachineFunction &MF) {
121-
auto& TII = *MF.getSubtarget<GCNSubtarget>().getInstrInfo();
120+
static inline void normalizeIrPostPhiElimination(MachineFunction &MF) {
121+
auto &TII = *MF.getSubtarget<GCNSubtarget>().getInstrInfo();
122122

123-
struct CFG_Rewrite_Entry {
124-
unordered_set<MachineBasicBlock *> pred_MBBs;
125-
MachineBasicBlock *succ_MBB;
126-
vector<MachineInstr*> body;
123+
struct CFGRewriteEntry {
124+
unordered_set<MachineBasicBlock *> PredMBBs;
125+
MachineBasicBlock *SuccMBB;
126+
vector<MachineInstr *> Body;
127127
};
128128

129-
vector<CFG_Rewrite_Entry> cfg_rewrite_entries;
129+
vector<CFGRewriteEntry> CfgRewriteEntries;
130130
for (MachineBasicBlock &MBB : MF) {
131-
CFG_Rewrite_Entry to_insert = {{}, &MBB, {}};
132-
for (MachineBasicBlock *pred_MBB : MBB.predecessors()) {
133-
Epilog_Iterator ep_it =
134-
get_epilog_for_successor(*pred_MBB, MBB);
131+
CFGRewriteEntry ToInsert = {{}, &MBB, {}};
132+
for (MachineBasicBlock *PredMBB : MBB.predecessors()) {
133+
EpilogIterator EpIt = getEpilogForSuccessor(*PredMBB, MBB);
135134

136-
vector<MachineInstr *> epilog;
137-
while (!ep_it.isEnd())
138-
epilog.push_back(&*ep_it++);
135+
vector<MachineInstr *> Epilog;
136+
while (!EpIt.isEnd())
137+
Epilog.push_back(&*EpIt++);
139138

140-
if (!epilogs_are_identical(to_insert.body, epilog, MBB)) {
141-
if (to_insert.pred_MBBs.size() && to_insert.body.size()) {
139+
if (!epilogsAreIdentical(ToInsert.Body, Epilog, MBB)) {
140+
if (ToInsert.PredMBBs.size() && ToInsert.Body.size()) {
142141
// Potentially, we need to insert a new entry. But first see if we
143142
// can find an existing entry with the same epilog.
144-
bool existing_entry_found = false;
145-
for (auto rev_it = cfg_rewrite_entries.rbegin();
146-
rev_it != cfg_rewrite_entries.rend() && rev_it->succ_MBB == &MBB;
147-
rev_it++)
148-
if (epilogs_are_identical(rev_it->body, epilog, MBB)) {
149-
rev_it->pred_MBBs.insert(pred_MBB);
150-
existing_entry_found = true;
143+
bool ExistingEntryFound = false;
144+
for (auto RevIt = CfgRewriteEntries.rbegin();
145+
RevIt != CfgRewriteEntries.rend() && RevIt->SuccMBB == &MBB;
146+
RevIt++)
147+
if (epilogsAreIdentical(RevIt->Body, Epilog, MBB)) {
148+
RevIt->PredMBBs.insert(PredMBB);
149+
ExistingEntryFound = true;
151150
break;
152151
}
153152

154-
if(!existing_entry_found)
155-
cfg_rewrite_entries.push_back(to_insert);
153+
if (!ExistingEntryFound)
154+
CfgRewriteEntries.push_back(ToInsert);
156155
}
157-
to_insert.pred_MBBs.clear();
158-
to_insert.body = epilog;
156+
ToInsert.PredMBBs.clear();
157+
ToInsert.Body = Epilog;
159158
}
160-
161-
to_insert.pred_MBBs.insert(pred_MBB);
159+
160+
ToInsert.PredMBBs.insert(PredMBB);
162161
}
163162

164163
// Handle the last potential rewrite entry. Lower instead of journaling a
165164
// rewrite entry if all predecessor MBBs are in this single entry.
166-
if (to_insert.pred_MBBs.size() == MBB.pred_size()) {
167-
move_body(to_insert.body, MBB);
168-
for (MachineBasicBlock *pred_MBB : to_insert.pred_MBBs) {
165+
if (ToInsert.PredMBBs.size() == MBB.pred_size()) {
166+
moveBody(ToInsert.Body, MBB);
167+
for (MachineBasicBlock *PredMBB : ToInsert.PredMBBs) {
169168
// Delete instructions that were lowered from epilog
170-
MachineInstr &branch_ins =
171-
get_branch_with_dest(*pred_MBB, *to_insert.succ_MBB);
172-
auto epilog_it = ++Epilog_Iterator(branch_ins.getIterator());
173-
while (!epilog_it.isEnd())
174-
epilog_it++->eraseFromBundle();
169+
MachineInstr &BranchIns =
170+
getBranchWithDest(*PredMBB, *ToInsert.SuccMBB);
171+
auto EpilogIt = ++EpilogIterator(BranchIns.getIterator());
172+
while (!EpilogIt.isEnd())
173+
EpilogIt++->eraseFromBundle();
175174
}
176175

177-
}
178-
else if (to_insert.body.size())
179-
cfg_rewrite_entries.push_back(to_insert);
176+
} else if (ToInsert.Body.size())
177+
CfgRewriteEntries.push_back(ToInsert);
180178
}
181179

182180
// Perform the journaled rewrites.
183-
for (auto &entry : cfg_rewrite_entries) {
184-
MachineBasicBlock *mezzanine_MBB = MF.CreateMachineBasicBlock();
185-
MF.insert(MF.end(),mezzanine_MBB);
181+
for (auto &Entry : CfgRewriteEntries) {
182+
MachineBasicBlock *MezzanineMBB = MF.CreateMachineBasicBlock();
183+
MF.insert(MF.end(), MezzanineMBB);
186184

187185
// Deal with mezzanine to successor succession.
188-
BuildMI(mezzanine_MBB, DebugLoc(), TII.get(AMDGPU::S_BRANCH)).addMBB(entry.succ_MBB);
189-
mezzanine_MBB->addSuccessor(entry.succ_MBB);
186+
BuildMI(MezzanineMBB, DebugLoc(), TII.get(AMDGPU::S_BRANCH))
187+
.addMBB(Entry.SuccMBB);
188+
MezzanineMBB->addSuccessor(Entry.SuccMBB);
190189

191190
// Move instructions to mezzanine block.
192-
move_body(entry.body, *mezzanine_MBB);
191+
moveBody(Entry.Body, *MezzanineMBB);
193192

194-
for (MachineBasicBlock *pred_MBB : entry.pred_MBBs) {
195-
//Deal with predecessor to mezzanine succession.
196-
MachineInstr &branch_ins =
197-
get_branch_with_dest(*pred_MBB, *entry.succ_MBB);
198-
assert(branch_ins.getOperand(0).isMBB() && "Branch instruction isn't.");
199-
branch_ins.getOperand(0).setMBB(mezzanine_MBB);
200-
pred_MBB->replaceSuccessor(entry.succ_MBB, mezzanine_MBB);
193+
for (MachineBasicBlock *PredMBB : Entry.PredMBBs) {
194+
// Deal with predecessor to mezzanine succession.
195+
MachineInstr &BranchIns = getBranchWithDest(*PredMBB, *Entry.SuccMBB);
196+
assert(BranchIns.getOperand(0).isMBB() && "Branch instruction isn't.");
197+
BranchIns.getOperand(0).setMBB(MezzanineMBB);
198+
PredMBB->replaceSuccessor(Entry.SuccMBB, MezzanineMBB);
201199

202200
// Delete instructions that were lowered from epilog
203-
auto epilog_it = ++Epilog_Iterator(branch_ins.getIterator());
204-
while (!epilog_it.isEnd())
205-
epilog_it++->eraseFromBundle();
201+
auto EpilogIt = ++EpilogIterator(BranchIns.getIterator());
202+
while (!EpilogIt.isEnd())
203+
EpilogIt++->eraseFromBundle();
206204
}
207205
}
208206
}
209207

210208
namespace std {
211-
template <>
212-
struct hash<Register>
213-
{
214-
std::size_t operator()(const Register& r) const
215-
{
216-
return hash<unsigned>()(r);
217-
}
218-
};
219-
}
209+
template <> struct hash<Register> {
210+
std::size_t operator()(const Register &R) const {
211+
return hash<unsigned>()(R);
212+
}
213+
};
214+
} // namespace std
220215

221-
static inline void hoist_unrelated_copies(MachineFunction &MF) {
216+
static inline void hoistUnrelatedCopies(MachineFunction &MF) {
222217
for (MachineBasicBlock &MBB : MF)
223-
for (MachineInstr &branch_MI : MBB) {
224-
if (!branch_MI.isBranch())
218+
for (MachineInstr &BranchMI : MBB) {
219+
if (!BranchMI.isBranch())
225220
continue;
226221

227-
unordered_set<Register> related_copy_sources;
228-
Epilog_Iterator epilog_it = branch_MI.getIterator();
229-
Epilog_Iterator copy_move_it = ++epilog_it;
230-
while (!epilog_it.isEnd()) {
231-
if (epilog_it->getOpcode() != AMDGPU::COPY)
232-
related_copy_sources.insert(epilog_it->getOperand(0).getReg());
233-
++epilog_it;
222+
unordered_set<Register> RelatedCopySources;
223+
EpilogIterator EpilogIt = BranchMI.getIterator();
224+
EpilogIterator CopyMoveIt = ++EpilogIt;
225+
while (!EpilogIt.isEnd()) {
226+
if (EpilogIt->getOpcode() != AMDGPU::COPY)
227+
RelatedCopySources.insert(EpilogIt->getOperand(0).getReg());
228+
++EpilogIt;
234229
}
235230

236-
while (!copy_move_it.isEnd()) {
237-
Epilog_Iterator next = copy_move_it; ++next;
238-
if (copy_move_it->getOpcode() == AMDGPU::COPY &&
239-
!related_copy_sources.count(copy_move_it->getOperand(1).getReg())
240-
|| copy_move_it->getOpcode() == AMDGPU::IMPLICIT_DEF) {
241-
MachineInstr &MI_to_move = *copy_move_it;
242-
MI_to_move.removeFromBundle();
243-
MBB.insert(branch_MI.getIterator(),&MI_to_move);
231+
while (!CopyMoveIt.isEnd()) {
232+
EpilogIterator Next = CopyMoveIt;
233+
++Next;
234+
if (CopyMoveIt->getOpcode() == AMDGPU::COPY &&
235+
!RelatedCopySources.count(CopyMoveIt->getOperand(1).getReg()) ||
236+
CopyMoveIt->getOpcode() == AMDGPU::IMPLICIT_DEF) {
237+
MachineInstr &MIToMove = *CopyMoveIt;
238+
MIToMove.removeFromBundle();
239+
MBB.insert(BranchMI.getIterator(), &MIToMove);
244240
}
245-
246-
copy_move_it = next;
241+
242+
CopyMoveIt = Next;
247243
}
248244
}
249245
}

‎llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -332,7 +332,7 @@ void SILowerControlFlow::emitElse(MachineInstr &MI) {
332332
if (LV)
333333
LV->replaceKillInstruction(SrcReg, MI, *OrSaveExec);
334334

335-
move_ins_before_phis(*OrSaveExec);
335+
moveInsBeforePhis(*OrSaveExec);
336336

337337
MachineBasicBlock *DestBB = MI.getOperand(2).getMBB();
338338

‎llvm/lib/Target/AMDGPU/SIRestoreNormalEpilog.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,8 @@ class SIRestoreNormalEpilogLegacy : public MachineFunctionPass {
2222
SIRestoreNormalEpilogLegacy() : MachineFunctionPass(ID) {}
2323

2424
bool runOnMachineFunction(MachineFunction &MF) override {
25-
hoist_unrelated_copies(MF);
26-
normalize_ir_post_phi_elimination(MF);
25+
hoistUnrelatedCopies(MF);
26+
normalizeIrPostPhiElimination(MF);
2727
return true;
2828
}
2929

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