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2 files changed

+34
-49
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‎llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3662,7 +3662,8 @@ bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsImpl(SDValue In, SDValue &Src,
36623662
}
36633663

36643664
// Prevent unnecessary subreg COPY to VGPR_16
3665-
if (Subtarget->useRealTrue16Insts() && Src.getOpcode() == ISD::TRUNCATE) {
3665+
if (Src.getOpcode() == ISD::TRUNCATE &&
3666+
Src.getOperand(0).getValueType().getSizeInBits() == 32) {
36663667
Src = Src.getOperand(0);
36673668
}
36683669
return true;

‎llvm/test/CodeGen/AMDGPU/mad-mix.ll‎

Lines changed: 32 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -209,21 +209,21 @@ define <2 x float> @v_mad_mix_v2f32(<2 x half> %src0, <2 x half> %src1, <2 x hal
209209
; GFX1100-NEXT: v_mov_b32_e32 v0, v3
210210
; GFX1100-NEXT: s_setpc_b64 s[30:31]
211211
;
212-
; SDAG-GFX900-LABEL: v_mad_mix_v2f32:
213-
; SDAG-GFX900: ; %bb.0:
214-
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
215-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
216-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]
217-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v3
218-
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
212+
; GFX900-LABEL: v_mad_mix_v2f32:
213+
; GFX900: ; %bb.0:
214+
; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
215+
; GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
216+
; GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
217+
; GFX900-NEXT: v_mov_b32_e32 v0, v3
218+
; GFX900-NEXT: s_setpc_b64 s[30:31]
219219
;
220-
; SDAG-GFX906-LABEL: v_mad_mix_v2f32:
221-
; SDAG-GFX906: ; %bb.0:
222-
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
223-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
224-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]
225-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v3
226-
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
220+
; GFX906-LABEL: v_mad_mix_v2f32:
221+
; GFX906: ; %bb.0:
222+
; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
223+
; GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
224+
; GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
225+
; GFX906-NEXT: v_mov_b32_e32 v0, v3
226+
; GFX906-NEXT: s_setpc_b64 s[30:31]
227227
;
228228
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32:
229229
; SDAG-GFX9GEN: ; %bb.0:
@@ -271,22 +271,6 @@ define <2 x float> @v_mad_mix_v2f32(<2 x half> %src0, <2 x half> %src1, <2 x hal
271271
; SDAG-CI-NEXT: v_mac_f32_e32 v0, v4, v2
272272
; SDAG-CI-NEXT: s_setpc_b64 s[30:31]
273273
;
274-
; GISEL-GFX900-LABEL: v_mad_mix_v2f32:
275-
; GISEL-GFX900: ; %bb.0:
276-
; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
277-
; GISEL-GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
278-
; GISEL-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
279-
; GISEL-GFX900-NEXT: v_mov_b32_e32 v0, v3
280-
; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]
281-
;
282-
; GISEL-GFX906-LABEL: v_mad_mix_v2f32:
283-
; GISEL-GFX906: ; %bb.0:
284-
; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
285-
; GISEL-GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]
286-
; GISEL-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]
287-
; GISEL-GFX906-NEXT: v_mov_b32_e32 v0, v3
288-
; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]
289-
;
290274
; GISEL-GFX9GEN-LABEL: v_mad_mix_v2f32:
291275
; GISEL-GFX9GEN: ; %bb.0:
292276
; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1223,18 +1207,18 @@ define <2 x float> @v_mad_mix_v2f32_f32imm1(<2 x half> %src0, <2 x half> %src1)
12231207
; SDAG-GFX900: ; %bb.0:
12241208
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12251209
; SDAG-GFX900-NEXT: s_mov_b32 s4, 1.0
1226-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1227-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1228-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v2
1210+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1211+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1212+
; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v2
12291213
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
12301214
;
12311215
; SDAG-GFX906-LABEL: v_mad_mix_v2f32_f32imm1:
12321216
; SDAG-GFX906: ; %bb.0:
12331217
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12341218
; SDAG-GFX906-NEXT: s_mov_b32 s4, 1.0
1235-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1236-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1237-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v2
1219+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1220+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1221+
; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v2
12381222
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
12391223
;
12401224
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imm1:
@@ -1355,18 +1339,18 @@ define <2 x float> @v_mad_mix_v2f32_cvtf16imminv2pi(<2 x half> %src0, <2 x half>
13551339
; SDAG-GFX900: ; %bb.0:
13561340
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13571341
; SDAG-GFX900-NEXT: s_mov_b32 s4, 0x3e230000
1358-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1359-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1360-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v2
1342+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1343+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1344+
; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v2
13611345
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
13621346
;
13631347
; SDAG-GFX906-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:
13641348
; SDAG-GFX906: ; %bb.0:
13651349
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13661350
; SDAG-GFX906-NEXT: s_mov_b32 s4, 0x3e230000
1367-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1368-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1369-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v2
1351+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1352+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1353+
; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v2
13701354
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
13711355
;
13721356
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:
@@ -1494,18 +1478,18 @@ define <2 x float> @v_mad_mix_v2f32_f32imminv2pi(<2 x half> %src0, <2 x half> %s
14941478
; SDAG-GFX900: ; %bb.0:
14951479
; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
14961480
; SDAG-GFX900-NEXT: s_mov_b32 s4, 0.15915494
1497-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1498-
; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1499-
; SDAG-GFX900-NEXT: v_mov_b32_e32 v1, v2
1481+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1482+
; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1483+
; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v2
15001484
; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]
15011485
;
15021486
; SDAG-GFX906-LABEL: v_mad_mix_v2f32_f32imminv2pi:
15031487
; SDAG-GFX906: ; %bb.0:
15041488
; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
15051489
; SDAG-GFX906-NEXT: s_mov_b32 s4, 0.15915494
1506-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1507-
; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]
1508-
; SDAG-GFX906-NEXT: v_mov_b32_e32 v1, v2
1490+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]
1491+
; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]
1492+
; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v2
15091493
; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]
15101494
;
15111495
; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imminv2pi:

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