Move comments

Author: s-barannikov

llvm/lib/Target/X86/X86InstrCompiler.td

@@ -870,7 +870,8 @@ let Predicates = [UseIncDec, In64BitMode] in {
   def : Pat<(X86lock_sub addr:$dst, (i64 -1)), (LOCK_INC64m addr:$dst)>;
 }
 
-// Atomic bit test.
+/// LOCK-prefixed arithmetic read-modify-write instructions.
+/// EFLAGS, OUTCHAIN = LADD(INCHAIN, PTR, RHS)
 def X86LBTest : SDTypeProfile<1, 3, [SDTCisVT<0, i32>, SDTCisPtrTy<1>,
                                      SDTCisVT<2, i8>, SDTCisVT<3, i32>]>;
 def x86bts : SDNode<"X86ISD::LBTS", X86LBTest,

llvm/lib/Target/X86/X86InstrFragments.td

@@ -226,6 +226,9 @@ def MMX_MOVQ64mr : MMXI<0x7F, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src),
 
 def MMX_X86movdq2q : SDNode<"X86ISD::MOVDQ2Q", SDTypeProfile<1, 1,
                             [SDTCisVT<0, x86mmx>, SDTCisVT<1, v2i64>]>>;
+
+// Copies a 64-bit value from the low word of an XMM vector
+// to an MMX vector.
 def MMX_X86movq2dq : SDNode<"X86ISD::MOVQ2DQ", SDTypeProfile<1, 1,
                             [SDTCisVT<0, v2i64>, SDTCisVT<1, x86mmx>]>>;
 

llvm/lib/Target/X86/X86InstrFragmentsSIMD.td

@@ -16,6 +16,8 @@
 
 def SDTRAOBinaryArith : SDTypeProfile<0, 2, [SDTCisPtrTy<0>, SDTCisInt<1>]>;
 
+/// RAO arithmetic instructions.
+/// OUTCHAIN = AADD(INCHAIN, PTR, RHS)
 def X86rao_add  : SDNode<"X86ISD::AADD", SDTRAOBinaryArith,
                          [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
 def X86rao_or   : SDNode<"X86ISD::AOR",  SDTRAOBinaryArith,

llvm/lib/Target/X86/X86InstrMMX.td

@@ -5265,6 +5265,8 @@ multiclass SS41I_extract8<bits<8> opc, string OpcodeStr> {
 let Predicates = [HasAVX, NoBWI] in
   defm VPEXTRB : SS41I_extract8<0x14, "vpextrb">, VEX, WIG;
 
+// Extract an 8-bit value from a vector and zero extend it to
+// i32, corresponds to X86::PEXTRB.
 defm PEXTRB      : SS41I_extract8<0x14, "pextrb">;
 
 

llvm/lib/Target/X86/X86InstrRAOINT.td

@@ -14,6 +14,7 @@
 //===----------------------------------------------------------------------===//
 // TSX instructions
 
+// Test if in transactional execution.
 def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>,
                      [SDNPHasChain, SDNPSideEffect]>;