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[RISCV] Enabled debug entry support by default
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4 files changed

+87
-9
lines changed

4 files changed

+87
-9
lines changed

‎clang/lib/Frontend/CompilerInvocation.cpp‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1975,9 +1975,10 @@ bool CompilerInvocation::ParseCodeGenArgs(CodeGenOptions &Opts, ArgList &Args,
19751975
}
19761976

19771977
const llvm::Triple::ArchType DebugEntryValueArchs[] = {
1978-
llvm::Triple::x86, llvm::Triple::x86_64, llvm::Triple::aarch64,
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llvm::Triple::arm, llvm::Triple::armeb, llvm::Triple::mips,
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llvm::Triple::mipsel, llvm::Triple::mips64, llvm::Triple::mips64el};
1978+
llvm::Triple::x86, llvm::Triple::x86_64, llvm::Triple::aarch64,
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llvm::Triple::arm, llvm::Triple::armeb, llvm::Triple::mips,
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llvm::Triple::mipsel, llvm::Triple::mips64, llvm::Triple::mips64el,
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llvm::Triple::riscv32, llvm::Triple::riscv64};
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if (Opts.OptimizationLevel > 0 && Opts.hasReducedDebugInfo() &&
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llvm::is_contained(DebugEntryValueArchs, T.getArch()))

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -23257,6 +23257,10 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
2325723257
if (VA.isRegLoc()) {
2325823258
// Queue up the argument copies and emit them at the end.
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RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
23260+
23261+
const TargetOptions &Options = DAG.getTarget().Options;
23262+
if (Options.EmitCallSiteInfo)
23263+
CSInfo.ArgRegPairs.emplace_back(VA.getLocReg(), i);
2326023264
} else {
2326123265
assert(VA.isMemLoc() && "Argument not register or memory");
2326223266
assert(!IsTailCall && "Tail call not allowed if stack is used "
@@ -23358,9 +23362,7 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
2335823362
if (CLI.CFIType)
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Ret.getNode()->setCFIType(CLI.CFIType->getZExtValue());
2336023364
DAG.addNoMergeSiteInfo(Ret.getNode(), CLI.NoMerge);
23361-
if (MF.getTarget().Options.EmitCallGraphSection && CB &&
23362-
CB->isIndirectCall())
23363-
DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo));
23365+
DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo));
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return Ret;
2336523367
}
2336623368

@@ -23369,10 +23371,8 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
2336923371
if (CLI.CFIType)
2337023372
Chain.getNode()->setCFIType(CLI.CFIType->getZExtValue());
2337123373

23372-
if (MF.getTarget().Options.EmitCallGraphSection && CB && CB->isIndirectCall())
23373-
DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo));
23374-
2337523374
DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge);
23375+
DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo));
2337623376
Glue = Chain.getValue(1);
2337723377

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// Mark the end of the call, which is glued to the call itself.

‎llvm/lib/Target/RISCV/RISCVTargetMachine.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -195,6 +195,9 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT,
195195
setMachineOutliner(true);
196196
setSupportsDefaultOutlining(true);
197197

198+
// RISC-V supports the debug entry values.
199+
setSupportsDebugEntryValues(true);
200+
198201
if (TT.isOSFuchsia() && !TT.isArch64Bit())
199202
report_fatal_error("Fuchsia is only supported for 64-bit");
200203

‎llvm/test/DebugInfo/RISCV/dw_op_entry_value.ll‎

Lines changed: 74 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,74 @@
1+
;; Test RISC-V 64 bit:
2+
; RUN: llc -emit-call-site-info -stop-after=livedebugvalues -mtriple=riscv64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK64
3+
; RUN: llc -force-instr-ref-livedebugvalues=1 -emit-call-site-info -stop-after=livedebugvalues -mtriple=riscv64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK64
4+
5+
;; Built from source:
6+
;; extern long fn1(long,long,long);
7+
;; long fn2(long a, long b, long c) {
8+
;; long local = fn1(a+b, c, b+10);
9+
;; if (local > 10)
10+
;; return local + 10;
11+
;; return b;
12+
;; }
13+
;; Using command:
14+
;; clang -g -O2 -target riscv64-linux-gnu m.c -c -S -emit-llvm
15+
;; Confirm that info from callSites attribute is used as entry_value in DIExpression.
16+
17+
;; Test riscv64:
18+
; CHECK64: renamable $x10 = nsw ADD $x11, killed renamable $x10
19+
; CHECK64-NEXT: DBG_VALUE $x10, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
20+
21+
; ModuleID = 'm.c'
22+
source_filename = "m.c"
23+
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
24+
target triple = "riscv64-unknown-linux-gnu"
25+
26+
; Function Attrs: nounwind uwtable
27+
define dso_local i64 @fn2(i64 noundef %a, i64 noundef %b, i64 noundef %c) local_unnamed_addr #0 !dbg !14 {
28+
entry:
29+
#dbg_value(i64 %a, !19, !DIExpression(), !23)
30+
#dbg_value(i64 %b, !20, !DIExpression(), !23)
31+
#dbg_value(i64 %c, !21, !DIExpression(), !23)
32+
%add = add nsw i64 %b, %a, !dbg !24
33+
%add1 = add nsw i64 %b, 10, !dbg !25
34+
%call = tail call i64 @fn1(i64 noundef %add, i64 noundef %c, i64 noundef %add1) #2, !dbg !26
35+
#dbg_value(i64 %call, !22, !DIExpression(), !23)
36+
%cmp = icmp sgt i64 %call, 10, !dbg !27
37+
%add2 = add nuw nsw i64 %call, 10, !dbg !27
38+
%retval.0 = select i1 %cmp, i64 %add2, i64 %b, !dbg !27
39+
ret i64 %retval.0, !dbg !29
40+
}
41+
42+
declare !dbg !30 i64 @fn1(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
43+
44+
attributes #0 = { nounwind uwtable "target-cpu"="generic-rv64" "target-features"="+64bit,+c,+m,+relax,+zicsr,+zmmul" }
45+
attributes #1 = { "target-cpu"="generic-rv64" "target-features"="+64bit,+c,+m,+relax,+zicsr,+zmmul" }
46+
attributes #2 = { nounwind }
47+
48+
!llvm.dbg.cu = !{!0}
49+
!llvm.module.flags = !{!2, !3, !4}
50+
!llvm.ident = !{!5}
51+
52+
!0 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
53+
!1 = !DIFile(filename: "m.c", directory: ".")
54+
!2 = !{i32 7, !"Dwarf Version", i32 5}
55+
!3 = !{i32 2, !"Debug Info Version", i32 3}
56+
!4 = !{i32 1, !"wchar_size", i32 4}
57+
!5 = !{!"clang"}
58+
!14 = distinct !DISubprogram(name: "fn2", scope: !1, file: !1, line: 2, type: !15, scopeLine: 2, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !18)
59+
!15 = !DISubroutineType(types: !16)
60+
!16 = !{!17, !17, !17, !17}
61+
!17 = !DIBasicType(name: "long", size: 64, encoding: DW_ATE_signed)
62+
!18 = !{!19, !20, !21, !22}
63+
!19 = !DILocalVariable(name: "a", arg: 1, scope: !14, file: !1, line: 2, type: !17)
64+
!20 = !DILocalVariable(name: "b", arg: 2, scope: !14, file: !1, line: 2, type: !17)
65+
!21 = !DILocalVariable(name: "c", arg: 3, scope: !14, file: !1, line: 2, type: !17)
66+
!22 = !DILocalVariable(name: "local", scope: !14, file: !1, line: 3, type: !17)
67+
!23 = !DILocation(line: 0, scope: !14)
68+
!24 = !DILocation(line: 3, column: 21, scope: !14)
69+
!25 = !DILocation(line: 3, column: 29, scope: !14)
70+
!26 = !DILocation(line: 3, column: 16, scope: !14)
71+
!27 = !DILocation(line: 4, column: 13, scope: !28)
72+
!28 = distinct !DILexicalBlock(scope: !14, file: !1, line: 4, column: 7)
73+
!29 = !DILocation(line: 7, column: 1, scope: !14)
74+
!30 = !DISubprogram(name: "fn1", scope: !1, file: !1, line: 1, type: !15, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized)

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