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Commit 08b5c94

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clang-format fixes
1 parent dc7004b commit 08b5c94

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2 files changed

+11
-11
lines changed

2 files changed

+11
-11
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -27423,11 +27423,11 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
2742327423

2742427424
// If inserting an UNDEF, just return the original vector (unless it makes the
2742527425
// result more poisonous).
27426-
if (N1.isUndef()){
27426+
if (N1.isUndef()) {
2742727427
if (VT.isFixedLengthVector()) {
2742827428
unsigned SubVecNumElts = N1.getValueType().getVectorNumElements();
27429-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
27430-
InsIdx, InsIdx + SubVecNumElts);
27429+
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(), InsIdx,
27430+
InsIdx + SubVecNumElts);
2743127431
if (DAG.isGuaranteedNotToBePoison(N0, EltMask))
2743227432
return N0;
2743327433
} else if (DAG.isGuaranteedNotToBePoison(N0))
@@ -27448,8 +27448,8 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
2744827448
return N1.getOperand(0);
2744927449
if (VT.isFixedLengthVector() && N1VT.isFixedLengthVector()) {
2745027450
unsigned SubVecNumElts = N1VT.getVectorNumElements();
27451-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
27452-
InsIdx, InsIdx + SubVecNumElts);
27451+
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(), InsIdx,
27452+
InsIdx + SubVecNumElts);
2745327453
if (DAG.isGuaranteedNotToBePoison(N1.getOperand(0), ~EltMask))
2745427454
return N1.getOperand(0);
2745527455
} else if (DAG.isGuaranteedNotToBePoison(N1.getOperand(0)))

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -7931,8 +7931,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
79317931
// But not if skipping the insert could make the result more poisonous.
79327932
if (N2.isUndef()) {
79337933
if (N3C && VT.isFixedLengthVector()) {
7934-
APInt EltMask = APInt::getOneBitSet(VT.getVectorNumElements(),
7935-
N3C->getZExtValue());
7934+
APInt EltMask =
7935+
APInt::getOneBitSet(VT.getVectorNumElements(), N3C->getZExtValue());
79367936
if (isGuaranteedNotToBePoison(N1, EltMask))
79377937
return N1;
79387938
} else if (isGuaranteedNotToBePoison(N1))
@@ -7985,8 +7985,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
79857985
if (VT.isFixedLengthVector() && N2VT.isFixedLengthVector()) {
79867986
unsigned LoBit = N3->getAsZExtVal();
79877987
unsigned HiBit = LoBit + N2VT.getVectorNumElements();
7988-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
7989-
LoBit, HiBit);
7988+
APInt EltMask =
7989+
APInt::getBitsSet(VT.getVectorNumElements(), LoBit, HiBit);
79907990
if (isGuaranteedNotToBePoison(N2.getOperand(0), ~EltMask))
79917991
return N2.getOperand(0);
79927992
} else if (isGuaranteedNotToBePoison(N2.getOperand(0)))
@@ -7999,8 +7999,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
79997999
if (VT.isFixedLengthVector()) {
80008000
unsigned LoBit = N3->getAsZExtVal();
80018001
unsigned HiBit = LoBit + N2VT.getVectorNumElements();
8002-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
8003-
LoBit, HiBit);
8002+
APInt EltMask =
8003+
APInt::getBitsSet(VT.getVectorNumElements(), LoBit, HiBit);
80048004
if (isGuaranteedNotToBePoison(N1, EltMask))
80058005
return N1;
80068006
} else if (isGuaranteedNotToBePoison(N1))

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