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GeneraluseAIGeneraluseAI
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[CIR][X86] Implement lowering for AVX512 ktest builtins (#169985)
part of [#167765](#167765) This is a follow-up patch to continue the work from <[#169774](#169774)>. It builds on the previous lowering infrastructure and extends support to the AVX512 ktest builtins.
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4 files changed

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‎clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp‎

Lines changed: 53 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -220,6 +220,18 @@ static mlir::Value emitX86MaskLogic(CIRGenBuilderTy &builder,
220220
ops[0].getType());
221221
}
222222

223+
static mlir::Value emitX86MaskTest(CIRGenBuilderTy &builder, mlir::Location loc,
224+
const std::string &intrinsicName,
225+
SmallVectorImpl<mlir::Value> &ops) {
226+
auto intTy = cast<cir::IntType>(ops[0].getType());
227+
unsigned numElts = intTy.getWidth();
228+
mlir::Value lhsVec = getMaskVecValue(builder, loc, ops[0], numElts);
229+
mlir::Value rhsVec = getMaskVecValue(builder, loc, ops[1], numElts);
230+
mlir::Type resTy = builder.getSInt32Ty();
231+
return emitIntrinsicCallOp(builder, loc, intrinsicName, resTy,
232+
mlir::ValueRange{lhsVec, rhsVec});
233+
}
234+
223235
static mlir::Value emitVecInsert(CIRGenBuilderTy &builder, mlir::Location loc,
224236
mlir::Value vec, mlir::Value value,
225237
mlir::Value indexOp) {
@@ -1155,26 +1167,61 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
11551167
case X86::BI__builtin_ia32_vpcomuw:
11561168
case X86::BI__builtin_ia32_vpcomud:
11571169
case X86::BI__builtin_ia32_vpcomuq:
1170+
cgm.errorNYI(expr->getSourceRange(),
1171+
std::string("unimplemented X86 builtin call: ") +
1172+
getContext().BuiltinInfo.getName(builtinID));
1173+
return {};
11581174
case X86::BI__builtin_ia32_kortestcqi:
11591175
case X86::BI__builtin_ia32_kortestchi:
11601176
case X86::BI__builtin_ia32_kortestcsi:
1161-
case X86::BI__builtin_ia32_kortestcdi:
1177+
case X86::BI__builtin_ia32_kortestcdi: {
1178+
mlir::Location loc = getLoc(expr->getExprLoc());
1179+
cir::IntType ty = cast<cir::IntType>(ops[0].getType());
1180+
mlir::Value allOnesOp =
1181+
builder.getConstAPInt(loc, ty, APInt::getAllOnes(ty.getWidth()));
1182+
mlir::Value orOp = emitX86MaskLogic(builder, loc, cir::BinOpKind::Or, ops);
1183+
mlir::Value cmp =
1184+
cir::CmpOp::create(builder, loc, cir::CmpOpKind::eq, orOp, allOnesOp);
1185+
return builder.createCast(cir::CastKind::bool_to_int, cmp,
1186+
cgm.convertType(expr->getType()));
1187+
}
11621188
case X86::BI__builtin_ia32_kortestzqi:
11631189
case X86::BI__builtin_ia32_kortestzhi:
11641190
case X86::BI__builtin_ia32_kortestzsi:
1165-
case X86::BI__builtin_ia32_kortestzdi:
1191+
case X86::BI__builtin_ia32_kortestzdi: {
1192+
mlir::Location loc = getLoc(expr->getExprLoc());
1193+
cir::IntType ty = cast<cir::IntType>(ops[0].getType());
1194+
mlir::Value allZerosOp = builder.getNullValue(ty, loc).getResult();
1195+
mlir::Value orOp = emitX86MaskLogic(builder, loc, cir::BinOpKind::Or, ops);
1196+
mlir::Value cmp =
1197+
cir::CmpOp::create(builder, loc, cir::CmpOpKind::eq, orOp, allZerosOp);
1198+
return builder.createCast(cir::CastKind::bool_to_int, cmp,
1199+
cgm.convertType(expr->getType()));
1200+
}
11661201
case X86::BI__builtin_ia32_ktestcqi:
1202+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1203+
"x86.avx512.ktestc.b", ops);
11671204
case X86::BI__builtin_ia32_ktestzqi:
1205+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1206+
"x86.avx512.ktestz.b", ops);
11681207
case X86::BI__builtin_ia32_ktestchi:
1208+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1209+
"x86.avx512.ktestc.w", ops);
11691210
case X86::BI__builtin_ia32_ktestzhi:
1211+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1212+
"x86.avx512.ktestz.w", ops);
11701213
case X86::BI__builtin_ia32_ktestcsi:
1214+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1215+
"x86.avx512.ktestc.d", ops);
11711216
case X86::BI__builtin_ia32_ktestzsi:
1217+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1218+
"x86.avx512.ktestz.d", ops);
11721219
case X86::BI__builtin_ia32_ktestcdi:
1220+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1221+
"x86.avx512.ktestc.q", ops);
11731222
case X86::BI__builtin_ia32_ktestzdi:
1174-
cgm.errorNYI(expr->getSourceRange(),
1175-
std::string("unimplemented X86 builtin call: ") +
1176-
getContext().BuiltinInfo.getName(builtinID));
1177-
return {};
1223+
return emitX86MaskTest(builder, getLoc(expr->getExprLoc()),
1224+
"x86.avx512.ktestz.q", ops);
11781225
case X86::BI__builtin_ia32_kaddqi:
11791226
return emitX86MaskAddLogic(builder, getLoc(expr->getExprLoc()),
11801227
"x86.avx512.kadd.b", ops);

‎clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c‎

Lines changed: 209 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -559,3 +559,212 @@ __m512i test_mm512_shufflehi_epi16(__m512i __A) {
559559
// OGCG: shufflevector <32 x i16> %{{.*}}, <32 x i16> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 5, i32 4, i32 4, i32 8, i32 9, i32 10, i32 11, i32 13, i32 13, i32 12, i32 12, i32 16, i32 17, i32 18, i32 19, i32 21, i32 21, i32 20, i32 20, i32 24, i32 25, i32 26, i32 27, i32 29, i32 29, i32 28, i32 28>
560560
return _mm512_shufflehi_epi16(__A, 5);
561561
}
562+
563+
unsigned char test_kortestc_mask32_u8(__mmask32 __A, __mmask32 __B) {
564+
// CIR-LABEL: _kortestc_mask32_u8
565+
// CIR: %[[ALL_ONES:.*]] = cir.const #cir.int<4294967295> : !u32i
566+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
567+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
568+
// CIR: %[[OR:.*]] = cir.binop(or, %[[LHS]], %[[RHS]]) : !cir.vector<32 x !cir.int<u, 1>>
569+
// CIR: %[[OR_INT:.*]] = cir.cast bitcast %[[OR]] : !cir.vector<32 x !cir.int<u, 1>> -> !u32i
570+
// CIR: %[[CMP:.*]] = cir.cmp(eq, %[[OR_INT]], %[[ALL_ONES]]) : !u32i, !cir.bool
571+
// CIR: %[[B2I:.*]] = cir.cast bool_to_int %[[CMP]] : !cir.bool -> !s32i
572+
// CIR: cir.cast integral %[[B2I]] : !s32i -> !u8i
573+
574+
// LLVM-LABEL: _kortestc_mask32_u8
575+
// LLVM: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
576+
// LLVM: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
577+
// LLVM: %[[OR:.*]] = or <32 x i1> %[[LHS]], %[[RHS]]
578+
// LLVM: %[[CAST:.*]] = bitcast <32 x i1> %[[OR]] to i32
579+
// LLVM: %[[CMP:.*]] = icmp eq i32 %[[CAST]], -1
580+
// LLVM: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
581+
// LLVM: trunc i32 %[[ZEXT]] to i8
582+
583+
// OGCG-LABEL: _kortestc_mask32_u8
584+
// OGCG: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
585+
// OGCG: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
586+
// OGCG: %[[OR:.*]] = or <32 x i1> %[[LHS]], %[[RHS]]
587+
// OGCG: %[[CAST:.*]] = bitcast <32 x i1> %[[OR]] to i32
588+
// OGCG: %[[CMP:.*]] = icmp eq i32 %[[CAST]], -1
589+
// OGCG: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
590+
// OGCG: trunc i32 %[[ZEXT]] to i8
591+
return _kortestc_mask32_u8(__A, __B);
592+
}
593+
594+
unsigned char test_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) {
595+
// CIR-LABEL: _kortestc_mask64_u8
596+
// CIR: %[[ALL_ONES:.*]] = cir.const #cir.int<18446744073709551615> : !u64i
597+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
598+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
599+
// CIR: %[[OR:.*]] = cir.binop(or, %[[LHS]], %[[RHS]]) : !cir.vector<64 x !cir.int<u, 1>>
600+
// CIR: %[[OR_INT:.*]] = cir.cast bitcast %[[OR]] : !cir.vector<64 x !cir.int<u, 1>> -> !u64i
601+
// CIR: %[[CMP:.*]] = cir.cmp(eq, %[[OR_INT]], %[[ALL_ONES]]) : !u64i, !cir.bool
602+
// CIR: %[[B2I:.*]] = cir.cast bool_to_int %[[CMP]] : !cir.bool -> !s32i
603+
// CIR: cir.cast integral %[[B2I]] : !s32i -> !u8i
604+
605+
// LLVM-LABEL: _kortestc_mask64_u8
606+
// LLVM: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
607+
// LLVM: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
608+
// LLVM: %[[OR:.*]] = or <64 x i1> %[[LHS]], %[[RHS]]
609+
// LLVM: %[[CAST:.*]] = bitcast <64 x i1> %[[OR]] to i64
610+
// LLVM: %[[CMP:.*]] = icmp eq i64 %[[CAST]], -1
611+
// LLVM: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
612+
// LLVM: trunc i32 %[[ZEXT]] to i8
613+
614+
// OGCG-LABEL: _kortestc_mask64_u8
615+
// OGCG: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
616+
// OGCG: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
617+
// OGCG: %[[OR:.*]] = or <64 x i1> %[[LHS]], %[[RHS]]
618+
// OGCG: %[[CAST:.*]] = bitcast <64 x i1> %[[OR]] to i64
619+
// OGCG: %[[CMP:.*]] = icmp eq i64 %[[CAST]], -1
620+
// OGCG: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
621+
// OGCG: trunc i32 %[[ZEXT]] to i8
622+
return _kortestc_mask64_u8(__A, __B);
623+
}
624+
625+
unsigned char test_kortestz_mask32_u8(__mmask32 __A, __mmask32 __B) {
626+
// CIR-LABEL: _kortestz_mask32_u8
627+
// CIR: %[[ZERO:.*]] = cir.const #cir.int<0> : !u32i
628+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
629+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
630+
// CIR: %[[OR:.*]] = cir.binop(or, %[[LHS]], %[[RHS]]) : !cir.vector<32 x !cir.int<u, 1>>
631+
// CIR: %[[OR_INT:.*]] = cir.cast bitcast %[[OR]] : !cir.vector<32 x !cir.int<u, 1>> -> !u32i
632+
// CIR: %[[CMP:.*]] = cir.cmp(eq, %[[OR_INT]], %[[ZERO]]) : !u32i, !cir.bool
633+
// CIR: %[[B2I:.*]] = cir.cast bool_to_int %[[CMP]] : !cir.bool -> !s32i
634+
// CIR: cir.cast integral %[[B2I]] : !s32i -> !u8i
635+
636+
// LLVM-LABEL: _kortestz_mask32_u8
637+
// LLVM: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
638+
// LLVM: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
639+
// LLVM: %[[OR:.*]] = or <32 x i1> %[[LHS]], %[[RHS]]
640+
// LLVM: %[[CAST:.*]] = bitcast <32 x i1> %[[OR]] to i32
641+
// LLVM: %[[CMP:.*]] = icmp eq i32 %[[CAST]], 0
642+
// LLVM: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
643+
// LLVM: trunc i32 %[[ZEXT]] to i8
644+
645+
// OGCG-LABEL: _kortestz_mask32_u8
646+
// OGCG: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
647+
// OGCG: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
648+
// OGCG: %[[OR:.*]] = or <32 x i1> %[[LHS]], %[[RHS]]
649+
// OGCG: %[[CAST:.*]] = bitcast <32 x i1> %[[OR]] to i32
650+
// OGCG: %[[CMP:.*]] = icmp eq i32 %[[CAST]], 0
651+
// OGCG: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
652+
// OGCG: trunc i32 %[[ZEXT]] to i8
653+
return _kortestz_mask32_u8(__A, __B);
654+
}
655+
656+
unsigned char test_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) {
657+
// CIR-LABEL: _kortestz_mask64_u8
658+
// CIR: %[[ZERO:.*]] = cir.const #cir.int<0> : !u64i
659+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
660+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
661+
// CIR: %[[OR:.*]] = cir.binop(or, %[[LHS]], %[[RHS]]) : !cir.vector<64 x !cir.int<u, 1>>
662+
// CIR: %[[OR_INT:.*]] = cir.cast bitcast %[[OR]] : !cir.vector<64 x !cir.int<u, 1>> -> !u64i
663+
// CIR: %[[CMP:.*]] = cir.cmp(eq, %[[OR_INT]], %[[ZERO]]) : !u64i, !cir.bool
664+
// CIR: %[[B2I:.*]] = cir.cast bool_to_int %[[CMP]] : !cir.bool -> !s32i
665+
// CIR: cir.cast integral %[[B2I]] : !s32i -> !u8i
666+
667+
// LLVM-LABEL: _kortestz_mask64_u8
668+
// LLVM: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
669+
// LLVM: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
670+
// LLVM: %[[OR:.*]] = or <64 x i1> %[[LHS]], %[[RHS]]
671+
// LLVM: %[[CAST:.*]] = bitcast <64 x i1> %[[OR]] to i64
672+
// LLVM: %[[CMP:.*]] = icmp eq i64 %[[CAST]], 0
673+
// LLVM: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
674+
// LLVM: trunc i32 %[[ZEXT]] to i8
675+
676+
// OGCG-LABEL: _kortestz_mask64_u8
677+
// OGCG: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
678+
// OGCG: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
679+
// OGCG: %[[OR:.*]] = or <64 x i1> %[[LHS]], %[[RHS]]
680+
// OGCG: %[[CAST:.*]] = bitcast <64 x i1> %[[OR]] to i64
681+
// OGCG: %[[CMP:.*]] = icmp eq i64 %[[CAST]], 0
682+
// OGCG: %[[ZEXT:.*]] = zext i1 %[[CMP]] to i32
683+
// OGCG: trunc i32 %[[ZEXT]] to i8
684+
return _kortestz_mask64_u8(__A, __B);
685+
}
686+
687+
unsigned char test_ktestc_mask32_u8(__mmask32 A, __mmask32 B) {
688+
// CIR-LABEL: _ktestc_mask32_u8
689+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
690+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
691+
// CIR: %[[RES:.*]] = cir.call_llvm_intrinsic "x86.avx512.ktestc.d"
692+
// CIR: cir.cast integral %[[RES]] : {{.*}} -> !u8i
693+
694+
// LLVM-LABEL: _ktestc_mask32_u8
695+
// LLVM: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
696+
// LLVM: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
697+
// LLVM: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestc.d(<32 x i1> %[[LHS]], <32 x i1> %[[RHS]])
698+
// LLVM: trunc i32 %[[RES]] to i8
699+
700+
// OGCG-LABEL: _ktestc_mask32_u8
701+
// OGCG: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
702+
// OGCG: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
703+
// OGCG: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestc.d
704+
// OGCG: trunc i32 %[[RES]] to i8
705+
return _ktestc_mask32_u8(A, B);
706+
}
707+
708+
unsigned char test_ktestz_mask32_u8(__mmask32 A, __mmask32 B) {
709+
// CIR-LABEL: _ktestz_mask32_u8
710+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
711+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x !cir.int<u, 1>>
712+
// CIR: %[[RES:.*]] = cir.call_llvm_intrinsic "x86.avx512.ktestz.d"
713+
// CIR: cir.cast integral %[[RES]] : {{.*}} -> !u8i
714+
715+
// LLVM-LABEL: _ktestz_mask32_u8
716+
// LLVM: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
717+
// LLVM: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
718+
// LLVM: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestz.d(<32 x i1> %[[LHS]], <32 x i1> %[[RHS]])
719+
// LLVM: trunc i32 %[[RES]] to i8
720+
721+
// OGCG-LABEL: _ktestz_mask32_u8
722+
// OGCG: %[[LHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
723+
// OGCG: %[[RHS:.*]] = bitcast i32 %{{.*}} to <32 x i1>
724+
// OGCG: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestz.d
725+
// OGCG: trunc i32 %[[RES]] to i8
726+
return _ktestz_mask32_u8(A, B);
727+
}
728+
729+
unsigned char test_ktestc_mask64_u8(__mmask64 A, __mmask64 B) {
730+
// CIR-LABEL: _ktestc_mask64_u8
731+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
732+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
733+
// CIR: %[[RES:.*]] = cir.call_llvm_intrinsic "x86.avx512.ktestc.q"
734+
// CIR: cir.cast integral %[[RES]] : {{.*}} -> !u8i
735+
736+
// LLVM-LABEL: _ktestc_mask64_u8
737+
// LLVM: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
738+
// LLVM: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
739+
// LLVM: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestc.q(<64 x i1> %[[LHS]], <64 x i1> %[[RHS]])
740+
// LLVM: trunc i32 %[[RES]] to i8
741+
742+
// OGCG-LABEL: _ktestc_mask64_u8
743+
// OGCG: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
744+
// OGCG: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
745+
// OGCG: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestc.q
746+
// OGCG: trunc i32 %[[RES]] to i8
747+
return _ktestc_mask64_u8(A, B);
748+
}
749+
750+
unsigned char test_ktestz_mask64_u8(__mmask64 A, __mmask64 B) {
751+
// CIR-LABEL: _ktestz_mask64_u8
752+
// CIR: %[[LHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
753+
// CIR: %[[RHS:.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x !cir.int<u, 1>>
754+
// CIR: %[[RES:.*]] = cir.call_llvm_intrinsic "x86.avx512.ktestz.q"
755+
// CIR: cir.cast integral %[[RES]] : {{.*}} -> !u8i
756+
757+
// LLVM-LABEL: _ktestz_mask64_u8
758+
// LLVM: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
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// LLVM: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
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// LLVM: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestz.q(<64 x i1> %[[LHS]], <64 x i1> %[[RHS]])
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// LLVM: trunc i32 %[[RES]] to i8
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// OGCG-LABEL: _ktestz_mask64_u8
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// OGCG: %[[LHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
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// OGCG: %[[RHS:.*]] = bitcast i64 %{{.*}} to <64 x i1>
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// OGCG: %[[RES:.*]] = call i32 @llvm.x86.avx512.ktestz.q
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// OGCG: trunc i32 %[[RES]] to i8
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return _ktestz_mask64_u8(A, B);
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}
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