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diggerlindiggerlin
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[PowerPC][AIX] Using milicode for memcmp instead of libcall (#147093)
AIX has "millicode" routines, which are functions loaded at boot time into fixed addresses in kernel memory. This allows them to be customized for the processor. The __memcmp routine is a millicode implementation; we use millicode for the memcmp function instead of a library call to improve performance.
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11 files changed

+62
-9
lines changed

11 files changed

+62
-9
lines changed

‎llvm/include/llvm/CodeGen/SelectionDAG.h

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Original file line numberDiff line numberDiff line change
@@ -1260,6 +1260,9 @@ class SelectionDAG {
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/// stack arguments from being clobbered.
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LLVM_ABI SDValue getStackArgumentTokenFactor(SDValue Chain);
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1263+
std::pair<SDValue, SDValue> getMemcmp(SDValue Chain, const SDLoc &dl,
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SDValue Dst, SDValue Src, SDValue Size,
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const CallInst *CI);
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/* \p CI if not null is the memset call being lowered.
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* \p OverrideTailCall is an optional parameter that can be used to override
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* the tail call optimization decision. */

‎llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
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namespace llvm {
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class CallInst;
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class SelectionDAG;
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//===----------------------------------------------------------------------===//
@@ -118,8 +119,7 @@ class SelectionDAGTargetInfo {
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virtual std::pair<SDValue, SDValue>
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EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
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SDValue Op1, SDValue Op2, SDValue Op3,
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MachinePointerInfo Op1PtrInfo,
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MachinePointerInfo Op2PtrInfo) const {
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const CallInst *CI) const {
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return std::make_pair(SDValue(), SDValue());
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}
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‎llvm/include/llvm/IR/RuntimeLibcalls.td

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@@ -276,6 +276,7 @@ foreach FPTy = ["F32", "F64", "F128", "PPCF128"] in {
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}
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// Memory
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def MEMCMP : RuntimeLibcall;
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def MEMCPY : RuntimeLibcall;
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def MEMMOVE : RuntimeLibcall;
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def MEMSET : RuntimeLibcall;
@@ -1990,12 +1991,14 @@ defset list<RuntimeLibcallImpl> PPCRuntimeLibcalls = {
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}
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defset list<RuntimeLibcallImpl> PPC64AIXCallList = {
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def ___memcmp64 : RuntimeLibcallImpl<MEMCMP>;
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def ___memmove64 : RuntimeLibcallImpl<MEMCPY>;
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def ___memset64 : RuntimeLibcallImpl<MEMSET>;
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def ___bzero64 : RuntimeLibcallImpl<BZERO>;
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}
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defset list<RuntimeLibcallImpl> PPC32AIXCallList = {
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def ___memcmp : RuntimeLibcallImpl<MEMCMP>;
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def ___memmove : RuntimeLibcallImpl<MEMMOVE>;
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def ___memset : RuntimeLibcallImpl<MEMSET>;
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def ___bzero : RuntimeLibcallImpl<BZERO>;

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

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Original file line numberDiff line numberDiff line change
@@ -8889,6 +8889,44 @@ static void checkAddrSpaceIsValidForLibcall(const TargetLowering *TLI,
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}
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}
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std::pair<SDValue, SDValue>
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SelectionDAG::getMemcmp(SDValue Chain, const SDLoc &dl, SDValue Mem0,
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SDValue Mem1, SDValue Size, const CallInst *CI) {
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const char *LibCallName = TLI->getLibcallName(RTLIB::MEMCMP);
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if (!LibCallName)
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return {};
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// Emit a library call.
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auto GetEntry = [](Type *Ty, SDValue &SDV) {
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TargetLowering::ArgListEntry E;
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E.Ty = Ty;
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E.Node = SDV;
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return E;
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};
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PointerType *PT = PointerType::getUnqual(*getContext());
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TargetLowering::ArgListTy Args = {
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GetEntry(PT, Mem0), GetEntry(PT, Mem1),
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GetEntry(getDataLayout().getIntPtrType(*getContext()), Size)};
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TargetLowering::CallLoweringInfo CLI(*this);
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bool IsTailCall = false;
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bool ReturnsFirstArg = CI && funcReturnsFirstArgOfCall(*CI);
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IsTailCall = CI && CI->isTailCall() &&
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isInTailCallPosition(*CI, getTarget(), ReturnsFirstArg);
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CLI.setDebugLoc(dl)
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.setChain(Chain)
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.setLibCallee(
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TLI->getLibcallCallingConv(RTLIB::MEMCMP),
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Type::getInt32Ty(*getContext()),
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getExternalSymbol(LibCallName, TLI->getPointerTy(getDataLayout())),
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std::move(Args))
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.setTailCall(IsTailCall);
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return TLI->LowerCallTo(CLI);
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}
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SDValue SelectionDAG::getMemcpy(
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SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size,
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Align Alignment, bool isVol, bool AlwaysInline, const CallInst *CI,

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9090,7 +9090,7 @@ bool SelectionDAGBuilder::visitMemCmpBCmpCall(const CallInst &I) {
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const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
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std::pair<SDValue, SDValue> Res = TSI.EmitTargetCodeForMemcmp(
90929092
DAG, getCurSDLoc(), DAG.getRoot(), getValue(LHS), getValue(RHS),
9093-
getValue(Size), MachinePointerInfo(LHS), MachinePointerInfo(RHS));
9093+
getValue(Size), &I);
90949094
if (Res.first.getNode()) {
90959095
processIntegerCallValue(I, Res.first, true);
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PendingLoads.push_back(Res.second);

‎llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,3 +22,9 @@ bool PPCSelectionDAGInfo::isTargetStrictFPOpcode(unsigned Opcode) const {
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return Opcode >= PPCISD::FIRST_STRICTFP_OPCODE &&
2323
Opcode <= PPCISD::LAST_STRICTFP_OPCODE;
2424
}
25+
26+
std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForMemcmp(
27+
SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2,
28+
SDValue Op3, const CallInst *CI) const {
29+
return DAG.getMemcmp(Chain, dl, Op1, Op2, Op3, CI);
30+
}

‎llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,11 @@ class PPCSelectionDAGInfo : public SelectionDAGTargetInfo {
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bool isTargetMemoryOpcode(unsigned Opcode) const override;
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bool isTargetStrictFPOpcode(unsigned Opcode) const override;
23+
24+
std::pair<SDValue, SDValue>
25+
EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
26+
SDValue Op1, SDValue Op2, SDValue Op3,
27+
const CallInst *CI) const;
2328
};
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} // namespace llvm

‎llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -181,8 +181,7 @@ static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg,
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std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(
183183
SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
184-
SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo,
185-
MachinePointerInfo Op2PtrInfo) const {
184+
SDValue Src2, SDValue Size, const CallInst *CI) const {
186185
SDValue CCReg;
187186
// Swap operands to invert CC == 1 vs. CC == 2 cases.
188187
if (auto *CSize = dyn_cast<ConstantSDNode>(Size)) {

‎llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,7 @@ class SystemZSelectionDAGInfo : public SelectionDAGTargetInfo {
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std::pair<SDValue, SDValue>
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EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
4343
SDValue Src1, SDValue Src2, SDValue Size,
44-
MachinePointerInfo Op1PtrInfo,
45-
MachinePointerInfo Op2PtrInfo) const override;
44+
const CallInst *CI) const override;
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4746
std::pair<SDValue, SDValue>
4847
EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,

‎llvm/test/CodeGen/PowerPC/memintr32.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ define i32 @memcmp_test(ptr nocapture noundef readonly %ptr1, ptr nocapture noun
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; CHECK-AIX-32-P9-NEXT: mflr r0
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; CHECK-AIX-32-P9-NEXT: stwu r1, -64(r1)
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; CHECK-AIX-32-P9-NEXT: stw r0, 72(r1)
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; CHECK-AIX-32-P9-NEXT: bl .memcmp[PR]
14+
; CHECK-AIX-32-P9-NEXT: bl .___memcmp[PR]
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; CHECK-AIX-32-P9-NEXT: nop
1616
; CHECK-AIX-32-P9-NEXT: addi r1, r1, 64
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; CHECK-AIX-32-P9-NEXT: lwz r0, 8(r1)

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