Add explicit to constructors

Co-authored-by: Sergei Barannikov <[email protected]>

Author: arsenm

llvm/lib/Target/ARM/ThumbRegisterInfo.h

@@ -27,7 +27,7 @@ struct ThumbRegisterInfo : public ARMBaseRegisterInfo {
   const bool IsThumb1Only;
 
 public:
-  ThumbRegisterInfo(const ARMSubtarget &STI);
+  explicit ThumbRegisterInfo(const ARMSubtarget &STI);
 
   const TargetRegisterClass *
   getLargestLegalSuperClass(const TargetRegisterClass *RC,

llvm/lib/Target/Mips/Mips16RegisterInfo.h

@@ -18,7 +18,7 @@
 namespace llvm {
 class Mips16RegisterInfo : public MipsRegisterInfo {
 public:
-  Mips16RegisterInfo(const MipsSubtarget &STI);
+  explicit Mips16RegisterInfo(const MipsSubtarget &STI);
 
   bool requiresRegisterScavenging(const MachineFunction &MF) const override;
 

llvm/lib/Target/Mips/MipsRegisterInfo.h

@@ -41,7 +41,7 @@ class MipsRegisterInfo : public MipsGenRegisterInfo {
     GlobalPointer = 3,
   };
 
-  MipsRegisterInfo(const MipsSubtarget &STI);
+  explicit MipsRegisterInfo(const MipsSubtarget &STI);
 
   /// Get PIC indirect call register
   static unsigned getPICCallReg();

llvm/lib/Target/Mips/MipsSERegisterInfo.h

@@ -20,7 +20,7 @@ namespace llvm {
 
 class MipsSERegisterInfo : public MipsRegisterInfo {
 public:
-  MipsSERegisterInfo(const MipsSubtarget &STI);
+  explicit MipsSERegisterInfo(const MipsSubtarget &STI);
 
   bool requiresRegisterScavenging(const MachineFunction &MF) const override;
 

llvm/lib/Target/Sparc/SparcRegisterInfo.h

@@ -26,7 +26,7 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo {
   const bool Is64Bit;
 
 public:
-  SparcRegisterInfo(const SparcSubtarget &STI);
+  explicit SparcRegisterInfo(const SparcSubtarget &STI);
 
   /// Code Generation virtual methods...
   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;