@@ -18920,22 +18920,15 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1892018920 Function *F = CGM.getIntrinsic(Intrin, { Src0->getType() });
1892118921 return Builder.CreateCall(F, { Src0, Builder.getFalse() });
1892218922 }
18923- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
1892418923 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmin_f64:
1892518924 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmax_f64:
1892618925 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f64:
1892718926 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fmin_f64:
1892818927 case AMDGPU::BI__builtin_amdgcn_flat_atomic_fmax_f64:
18929- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f32:
18930- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16: {
18928+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_f32: {
1893118929 Intrinsic::ID IID;
1893218930 llvm::Type *ArgTy = llvm::Type::getDoubleTy(getLLVMContext());
1893318931 switch (BuiltinID) {
18934- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
18935- ArgTy = llvm::FixedVectorType::get(
18936- llvm::Type::getHalfTy(getLLVMContext()), 2);
18937- IID = Intrinsic::amdgcn_global_atomic_fadd;
18938- break;
1893918932 case AMDGPU::BI__builtin_amdgcn_global_atomic_fmin_f64:
1894018933 IID = Intrinsic::amdgcn_global_atomic_fmin;
1894118934 break;
@@ -18955,11 +18948,6 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1895518948 ArgTy = llvm::Type::getFloatTy(getLLVMContext());
1895618949 IID = Intrinsic::amdgcn_flat_atomic_fadd;
1895718950 break;
18958- case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16:
18959- ArgTy = llvm::FixedVectorType::get(
18960- llvm::Type::getHalfTy(getLLVMContext()), 2);
18961- IID = Intrinsic::amdgcn_flat_atomic_fadd;
18962- break;
1896318951 }
1896418952 llvm::Value *Addr = EmitScalarExpr(E->getArg(0));
1896518953 llvm::Value *Val = EmitScalarExpr(E->getArg(1));
@@ -19360,7 +19348,9 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1936019348 case AMDGPU::BI__builtin_amdgcn_ds_fminf:
1936119349 case AMDGPU::BI__builtin_amdgcn_ds_fmaxf:
1936219350 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f32:
19363- case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64: {
19351+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64:
19352+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
19353+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16: {
1936419354 llvm::AtomicRMWInst::BinOp BinOp;
1936519355 switch (BuiltinID) {
1936619356 case AMDGPU::BI__builtin_amdgcn_atomic_inc32:
@@ -19378,6 +19368,8 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
1937819368 case AMDGPU::BI__builtin_amdgcn_ds_atomic_fadd_v2bf16:
1937919369 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f32:
1938019370 case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_f64:
19371+ case AMDGPU::BI__builtin_amdgcn_global_atomic_fadd_v2f16:
19372+ case AMDGPU::BI__builtin_amdgcn_flat_atomic_fadd_v2f16:
1938119373 BinOp = llvm::AtomicRMWInst::FAdd;
1938219374 break;
1938319375 case AMDGPU::BI__builtin_amdgcn_ds_fminf:
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