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[RISCV] Merge Xqci Decoder Tables
RISC-V has multiple decoder tables because there is no guarantee that non-standard extensions do not overlap with each other. Qualcomm's Xqci family of extensions are intended to be implemented together, and therefore we want a single decode table for this group of extensions. This should be more efficient overall. To implement this, the key addition is `TRY_TO_DECODE_FEATURE_ANY`, which will use the provided decoder table if any of the features from the FeatureBitset (first argument) are enabled, rather than if all are enabled.
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-50
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2 files changed

+47
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‎llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp‎

Lines changed: 25 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -606,6 +606,8 @@ void RISCVDisassembler::addSPOperands(MCInst &MI) const {
606606
(void)nullptr)
607607
#define TRY_TO_DECODE_FEATURE(FEATURE, DECODER_TABLE, DESC) \
608608
TRY_TO_DECODE(STI.hasFeature(FEATURE), DECODER_TABLE, DESC)
609+
#define TRY_TO_DECODE_FEATURE_ANY(FEATURES, DECODER_TABLE, DESC) \
610+
TRY_TO_DECODE((STI.getFeatureBits() & (FEATURES)).any(), DECODER_TABLE, DESC)
609611

610612
DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
611613
ArrayRef<uint8_t> Bytes,
@@ -693,24 +695,17 @@ DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
693695
"CORE-V SIMD extensions");
694696
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCVbi, DecoderTableXCVbi32,
695697
"CORE-V Immediate Branching");
696-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcicsr, DecoderTableXqcicsr32,
697-
"Qualcomm uC CSR");
698-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcisls, DecoderTableXqcisls32,
699-
"Qualcomm uC Scaled Load Store");
700-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcia, DecoderTableXqcia32,
701-
"Qualcomm uC Arithmetic");
702-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcics, DecoderTableXqcics32,
703-
"Qualcomm uC Conditional Select");
704-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcilsm, DecoderTableXqcilsm32,
705-
"Qualcomm uC Load Store Multiple");
706-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqciac, DecoderTableXqciac32,
707-
"Qualcomm uC Load-Store Address Calculation");
708-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcicli, DecoderTableXqcicli32,
709-
"Qualcomm uC Conditional Load Immediate");
710-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcicm, DecoderTableXqcicm32,
711-
"Qualcomm uC Conditional Move");
712-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqciint, DecoderTableXqciint32,
713-
"Qualcomm uC Interrupts");
698+
699+
FeatureBitset XqciFeaturesWith32BitInsts = {
700+
RISCV::FeatureVendorXqcicsr, RISCV::FeatureVendorXqcisls,
701+
RISCV::FeatureVendorXqcia, RISCV::FeatureVendorXqcics,
702+
RISCV::FeatureVendorXqcilsm, RISCV::FeatureVendorXqciac,
703+
RISCV::FeatureVendorXqcicli, RISCV::FeatureVendorXqcicm,
704+
RISCV::FeatureVendorXqciint
705+
};
706+
TRY_TO_DECODE_FEATURE_ANY(XqciFeaturesWith32BitInsts, DecoderTableXqci32,
707+
"Qualcomm uC Extensions");
708+
714709
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXRivosVizip, DecoderTableXRivos32,
715710
"Rivos");
716711

@@ -739,12 +734,13 @@ DecodeStatus RISCVDisassembler::getInstruction16(MCInst &MI, uint64_t &Size,
739734
"Zcmt (16-bit Table Jump Instructions)");
740735
TRY_TO_DECODE_FEATURE(RISCV::FeatureStdExtZcmp, DecoderTableRVZcmp16,
741736
"Zcmp (16-bit Push/Pop & Double Move Instructions)");
742-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqciac, DecoderTableXqciac16,
743-
"Qualcomm uC Load-Store Address Calculation 16bit");
744-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcicm, DecoderTableXqcicm16,
745-
"Qualcomm uC Conditional Move 16bit");
746-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqciint, DecoderTableXqciint16,
747-
"Qualcomm uC Interrupts 16bit");
737+
738+
FeatureBitset XqciFeaturesWith16BitInsts = {RISCV::FeatureVendorXqciac,
739+
RISCV::FeatureVendorXqcicm,
740+
RISCV::FeatureVendorXqciint};
741+
TRY_TO_DECODE_FEATURE_ANY(XqciFeaturesWith16BitInsts, DecoderTableXqci16,
742+
"Qualcomm uC 16bit");
743+
748744
TRY_TO_DECODE_AND_ADD_SP(STI.hasFeature(RISCV::FeatureVendorXwchc),
749745
DecoderTableXwchc16, "WCH QingKe XW");
750746
TRY_TO_DECODE_AND_ADD_SP(true, DecoderTable16,
@@ -767,10 +763,11 @@ DecodeStatus RISCVDisassembler::getInstruction48(MCInst &MI, uint64_t &Size,
767763
for (size_t i = Size; i-- != 0;) {
768764
Insn += (static_cast<uint64_t>(Bytes[i]) << 8 * i);
769765
}
770-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcilia, DecoderTableXqcilia48,
771-
"Qualcomm uC Large Immediate Arithmetic 48bit");
772-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcilo, DecoderTableXqcilo48,
773-
"Qualcomm uC Large Offset Load Store 48bit");
766+
767+
FeatureBitset XqciFeaturesWith48BitInsts = {RISCV::FeatureVendorXqcilia,
768+
RISCV::FeatureVendorXqcilo};
769+
TRY_TO_DECODE_FEATURE_ANY(XqciFeaturesWith48BitInsts, DecoderTableXqci48,
770+
"Qualcomm uC 48bit");
774771

775772
return MCDisassembler::Fail;
776773
}

‎llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td‎

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -283,7 +283,7 @@ class QCIRVInstEI<bits<3> funct3, bits<2> funct2, string opcodestr>
283283
// Instructions
284284
//===----------------------------------------------------------------------===//
285285

286-
let Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqcicsr" in {
286+
let Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqci" in {
287287
let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
288288
def QC_CSRRWR : RVInstR<0b1000110, 0b000, OPC_SYSTEM, (outs GPR:$rd),
289289
(ins GPR:$rs1, GPRNoX0:$rs2), "qc.csrrwr",
@@ -293,9 +293,9 @@ let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
293293
(ins uimm5:$rs1, GPRNoX0:$rs2), "qc.csrrwri",
294294
"$rd, $rs1, $rs2">;
295295
} // hasSideEffects = 1, mayLoad = 0, mayStore = 0
296-
} // Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqcicsr"
296+
} // Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqci"
297297

298-
let Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqcisls" in {
298+
let Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqci" in {
299299
def QC_LRB : QCILoad_ScaleIdx<0b1000, "qc.lrb">;
300300
def QC_LRH : QCILoad_ScaleIdx<0b1001, "qc.lrh">;
301301
def QC_LRW : QCILoad_ScaleIdx<0b1010, "qc.lrw">;
@@ -305,9 +305,9 @@ let Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqcisls" in {
305305
def QC_SRB : QCIStore_ScaleIdx<0b1101, "qc.srb">;
306306
def QC_SRH : QCIStore_ScaleIdx<0b1110, "qc.srh">;
307307
def QC_SRW : QCIStore_ScaleIdx<0b1111, "qc.srw">;
308-
} // Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqcisls"
308+
} // Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqci"
309309

310-
let Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqcia" in {
310+
let Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqci" in {
311311
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
312312
def QC_SLASAT : QCIRVInstRR<0b01010, GPRNoX0, "qc.slasat">;
313313
def QC_SLLSAT : QCIRVInstRR<0b01100, GPRNoX0, "qc.sllsat">;
@@ -329,9 +329,9 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
329329
def QC_NORMU : QCIRVInstR<0b1000, "qc.normu">;
330330
def QC_NORMEU : QCIRVInstR<0b1001, "qc.normeu">;
331331
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
332-
} // Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqcia"
332+
} // Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqci"
333333

334-
let Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqciac" in {
334+
let Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqci" in {
335335
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
336336
def QC_C_MULIADD : RVInst16CL<0b001, 0b10, (outs GPRC:$rd_wb),
337337
(ins GPRC:$rd, GPRC:$rs1, uimm5:$uimm),
@@ -360,9 +360,9 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
360360
}
361361

362362
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
363-
} // Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqciac"
363+
} // Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqci"
364364

365-
let Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqcics" in {
365+
let Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqci" in {
366366
def QC_SELECTIIEQ : QCISELECTIICC <0b010, "qc.selectiieq">;
367367
def QC_SELECTIINE : QCISELECTIICC <0b011, "qc.selectiine">;
368368
def QC_SELECTIEQ : QCISELECTICC <0b010, "qc.selectieq">;
@@ -371,19 +371,19 @@ let Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqcics" in {
371371
def QC_SELECTNEI : QCISELECTCCI <0b011, "qc.selectnei">;
372372
def QC_SELECTIEQI : QCISELECTICCI <0b010, "qc.selectieqi">;
373373
def QC_SELECTINEI : QCISELECTICCI <0b011, "qc.selectinei">;
374-
} // Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqcics"
374+
} // Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqci"
375375

376-
let Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqcilsm" in {
376+
let Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqci" in {
377377
def QC_SWM : QCIStoreMultiple<0b00, GPRNoX0, "qc.swm">;
378378
def QC_SWMI : QCIStoreMultiple<0b01, uimm5nonzero, "qc.swmi">;
379379
def QC_SETWM : QCIStoreMultiple<0b10, GPRNoX0, "qc.setwm">;
380380
def QC_SETWMI : QCIStoreMultiple<0b11, uimm5nonzero, "qc.setwmi">;
381381

382382
def QC_LWM : QCILoadMultiple<0b00, GPRNoX0, "qc.lwm">;
383383
def QC_LWMI : QCILoadMultiple<0b01, uimm5nonzero, "qc.lwmi">;
384-
} // Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqcilsm"
384+
} // Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqci"
385385

386-
let Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqcicli" in {
386+
let Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqci" in {
387387
def QC_LIEQ : QCILICC<0b000, 0b01, GPRNoX0, "qc.lieq">;
388388
def QC_LINE : QCILICC<0b001, 0b01, GPRNoX0, "qc.line">;
389389
def QC_LILT : QCILICC<0b100, 0b01, GPRNoX0, "qc.lilt">;
@@ -397,9 +397,9 @@ let Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqcicli" in {
397397
def QC_LIGEI : QCILICC<0b101, 0b11, simm5, "qc.ligei">;
398398
def QC_LILTUI : QCILICC<0b110, 0b11, uimm5, "qc.liltui">;
399399
def QC_LIGEUI : QCILICC<0b111, 0b11, uimm5, "qc.ligeui">;
400-
} // Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqcicli"
400+
} // Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqci"
401401

402-
let Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqcicm" in {
402+
let Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqci" in {
403403
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
404404
def QC_C_MVEQZ : RVInst16CL<0b101, 0b10, (outs GPRC:$rd_wb),
405405
(ins GPRC:$rd, GPRC:$rs1),
@@ -423,9 +423,9 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
423423
def QC_MVGEI : QCIMVCCI<0b101, "qc.mvgei", simm5>;
424424
def QC_MVLTUI : QCIMVCCI<0b110, "qc.mvltui", uimm5>;
425425
def QC_MVGEUI : QCIMVCCI<0b111, "qc.mvgeui", uimm5>;
426-
} // Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqcicm"
426+
} // Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqci"
427427

428-
let Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqciint" in {
428+
let Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqci" in {
429429
let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
430430
def QC_C_DIR : RVInst16CI<0b000, 0b10, (outs GPRNoX0:$rd), (ins),
431431
"qc.c.dir", "$rd"> {
@@ -455,9 +455,9 @@ let Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqciint" in {
455455

456456
let mayLoad = 1, mayStore = 1, isReturn = 1, isTerminator = 1 in
457457
def QC_C_MILEAVERET : QCIRVInst16CI_NONE<0b10100, "qc.c.mileaveret">;
458-
} // Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqciint"
458+
} // Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqci"
459459

460-
let Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqcilo" in {
460+
let Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqci" in {
461461
def QC_E_LB : QCIRVInstEILoad<0b101, 0b00, "qc.e.lb">;
462462
def QC_E_LBU : QCIRVInstEILoad<0b101, 0b01, "qc.e.lbu">;
463463
def QC_E_LH : QCIRVInstEILoad<0b101, 0b10, "qc.e.lh">;
@@ -467,9 +467,9 @@ let Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqcilo" in {
467467
def QC_E_SB : QCIRVInstESStore<0b110, 0b01, "qc.e.sb">;
468468
def QC_E_SH : QCIRVInstESStore<0b110, 0b10, "qc.e.sh">;
469469
def QC_E_SW : QCIRVInstESStore<0b110, 0b11, "qc.e.sw">;
470-
} // Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqcilo"
470+
} // Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqci"
471471

472-
let Predicates = [HasVendorXqcilia, IsRV32], DecoderNamespace = "Xqcilia" in {
472+
let Predicates = [HasVendorXqcilia, IsRV32], DecoderNamespace = "Xqci" in {
473473
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
474474
def QC_E_XORAI : QCIRVInstEAI<0b001, 0b0, "qc.e.xorai">;
475475
def QC_E_ORAI : QCIRVInstEAI<0b001, 0b1, "qc.e.orai" >;
@@ -481,7 +481,7 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
481481
def QC_E_ADDI : QCIRVInstEI<0b011, 0b10, "qc.e.addi">;
482482
def QC_E_ANDI : QCIRVInstEI<0b011, 0b11, "qc.e.andi">;
483483
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
484-
} // Predicates = [HasVendorXqcilia, IsRV32], DecoderNamespace = "Xqcilia"
484+
} // Predicates = [HasVendorXqcilia, IsRV32], DecoderNamespace = "Xqci"
485485

486486
//===----------------------------------------------------------------------===//
487487
// Aliases

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