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RKSimonRKSimon
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[X86] Allow AVX512 rotate intrinsics to be used in constexpr (#157652)
Now that they wrap the __builtin_elementwise_fshl/fshr builtin intrinsics this is pretty trivial. Another step towards #153152 - just VBMI2 double shifts remaining
1 parent 4d20027 commit 0a5012f

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4 files changed

+72
-36
lines changed

4 files changed

+72
-36
lines changed

‎clang/lib/Headers/avx512fintrin.h‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -4731,43 +4731,43 @@ _mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A)
47314731
(__v8di)_mm512_setzero_si512());
47324732
}
47334733

4734-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4734+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
47354735
_mm512_rorv_epi32 (__m512i __A, __m512i __B)
47364736
{
47374737
return (__m512i)__builtin_elementwise_fshr((__v16su)__A,(__v16su)__A, (__v16su)__B);
47384738
}
47394739

4740-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4740+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
47414741
_mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
47424742
{
47434743
return (__m512i)__builtin_ia32_selectd_512(__U,
47444744
(__v16si)_mm512_rorv_epi32(__A, __B),
47454745
(__v16si)__W);
47464746
}
47474747

4748-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4748+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
47494749
_mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
47504750
{
47514751
return (__m512i)__builtin_ia32_selectd_512(__U,
47524752
(__v16si)_mm512_rorv_epi32(__A, __B),
47534753
(__v16si)_mm512_setzero_si512());
47544754
}
47554755

4756-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4756+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
47574757
_mm512_rorv_epi64 (__m512i __A, __m512i __B)
47584758
{
47594759
return (__m512i)__builtin_elementwise_fshr((__v8du)__A, (__v8du)__A, (__v8du)__B);
47604760
}
47614761

4762-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4762+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
47634763
_mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
47644764
{
47654765
return (__m512i)__builtin_ia32_selectq_512(__U,
47664766
(__v8di)_mm512_rorv_epi64(__A, __B),
47674767
(__v8di)__W);
47684768
}
47694769

4770-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4770+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
47714771
_mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
47724772
{
47734773
return (__m512i)__builtin_ia32_selectq_512(__U,
@@ -4843,43 +4843,43 @@ _mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
48434843
(__v8di)_mm512_rol_epi64((a), (b)), \
48444844
(__v8di)_mm512_setzero_si512()))
48454845

4846-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4846+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
48474847
_mm512_rolv_epi32 (__m512i __A, __m512i __B)
48484848
{
48494849
return (__m512i)__builtin_elementwise_fshl((__v16su)__A, (__v16su)__A, (__v16su)__B);
48504850
}
48514851

4852-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4852+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
48534853
_mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
48544854
{
48554855
return (__m512i)__builtin_ia32_selectd_512(__U,
48564856
(__v16si)_mm512_rolv_epi32(__A, __B),
48574857
(__v16si)__W);
48584858
}
48594859

4860-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4860+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
48614861
_mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
48624862
{
48634863
return (__m512i)__builtin_ia32_selectd_512(__U,
48644864
(__v16si)_mm512_rolv_epi32(__A, __B),
48654865
(__v16si)_mm512_setzero_si512());
48664866
}
48674867

4868-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4868+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
48694869
_mm512_rolv_epi64 (__m512i __A, __m512i __B)
48704870
{
48714871
return (__m512i)__builtin_elementwise_fshl((__v8du)__A, (__v8du)__A, (__v8du)__B);
48724872
}
48734873

4874-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4874+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
48754875
_mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
48764876
{
48774877
return (__m512i)__builtin_ia32_selectq_512(__U,
48784878
(__v8di)_mm512_rolv_epi64(__A, __B),
48794879
(__v8di)__W);
48804880
}
48814881

4882-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
4882+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
48834883
_mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
48844884
{
48854885
return (__m512i)__builtin_ia32_selectq_512(__U,

‎clang/lib/Headers/avx512vlintrin.h‎

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -4180,87 +4180,87 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
41804180
(__v4di)_mm256_rol_epi64((a), (b)), \
41814181
(__v4di)_mm256_setzero_si256()))
41824182

4183-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4183+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
41844184
_mm_rolv_epi32 (__m128i __A, __m128i __B)
41854185
{
41864186
return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__A, (__v4su)__B);
41874187
}
41884188

4189-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4189+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
41904190
_mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
41914191
{
41924192
return (__m128i)__builtin_ia32_selectd_128(__U,
41934193
(__v4si)_mm_rolv_epi32(__A, __B),
41944194
(__v4si)__W);
41954195
}
41964196

4197-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4197+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
41984198
_mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
41994199
{
42004200
return (__m128i)__builtin_ia32_selectd_128(__U,
42014201
(__v4si)_mm_rolv_epi32(__A, __B),
42024202
(__v4si)_mm_setzero_si128());
42034203
}
42044204

4205-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4205+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
42064206
_mm256_rolv_epi32 (__m256i __A, __m256i __B)
42074207
{
42084208
return (__m256i)__builtin_elementwise_fshl((__v8su)__A, (__v8su)__A, (__v8su)__B);
42094209
}
42104210

4211-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4211+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
42124212
_mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
42134213
{
42144214
return (__m256i)__builtin_ia32_selectd_256(__U,
42154215
(__v8si)_mm256_rolv_epi32(__A, __B),
42164216
(__v8si)__W);
42174217
}
42184218

4219-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4219+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
42204220
_mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
42214221
{
42224222
return (__m256i)__builtin_ia32_selectd_256(__U,
42234223
(__v8si)_mm256_rolv_epi32(__A, __B),
42244224
(__v8si)_mm256_setzero_si256());
42254225
}
42264226

4227-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4227+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
42284228
_mm_rolv_epi64 (__m128i __A, __m128i __B)
42294229
{
42304230
return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__A, (__v2du)__B);
42314231
}
42324232

4233-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4233+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
42344234
_mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
42354235
{
42364236
return (__m128i)__builtin_ia32_selectq_128(__U,
42374237
(__v2di)_mm_rolv_epi64(__A, __B),
42384238
(__v2di)__W);
42394239
}
42404240

4241-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4241+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
42424242
_mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
42434243
{
42444244
return (__m128i)__builtin_ia32_selectq_128(__U,
42454245
(__v2di)_mm_rolv_epi64(__A, __B),
42464246
(__v2di)_mm_setzero_si128());
42474247
}
42484248

4249-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4249+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
42504250
_mm256_rolv_epi64 (__m256i __A, __m256i __B)
42514251
{
42524252
return (__m256i)__builtin_elementwise_fshl((__v4du)__A, (__v4du)__A, (__v4du)__B);
42534253
}
42544254

4255-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4255+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
42564256
_mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
42574257
{
42584258
return (__m256i)__builtin_ia32_selectq_256(__U,
42594259
(__v4di)_mm256_rolv_epi64(__A, __B),
42604260
(__v4di)__W);
42614261
}
42624262

4263-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4263+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
42644264
_mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
42654265
{
42664266
return (__m256i)__builtin_ia32_selectq_256(__U,
@@ -4446,87 +4446,87 @@ _mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) {
44464446
(__v4di)_mm256_setzero_si256());
44474447
}
44484448

4449-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4449+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
44504450
_mm_rorv_epi32 (__m128i __A, __m128i __B)
44514451
{
44524452
return (__m128i)__builtin_elementwise_fshr((__v4su)__A, (__v4su)__A, (__v4su)__B);
44534453
}
44544454

4455-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4455+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
44564456
_mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
44574457
{
44584458
return (__m128i)__builtin_ia32_selectd_128(__U,
44594459
(__v4si)_mm_rorv_epi32(__A, __B),
44604460
(__v4si)__W);
44614461
}
44624462

4463-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4463+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
44644464
_mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
44654465
{
44664466
return (__m128i)__builtin_ia32_selectd_128(__U,
44674467
(__v4si)_mm_rorv_epi32(__A, __B),
44684468
(__v4si)_mm_setzero_si128());
44694469
}
44704470

4471-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4471+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
44724472
_mm256_rorv_epi32 (__m256i __A, __m256i __B)
44734473
{
44744474
return (__m256i)__builtin_elementwise_fshr((__v8su)__A, (__v8su)__A, (__v8su)__B);
44754475
}
44764476

4477-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4477+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
44784478
_mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
44794479
{
44804480
return (__m256i)__builtin_ia32_selectd_256(__U,
44814481
(__v8si)_mm256_rorv_epi32(__A, __B),
44824482
(__v8si)__W);
44834483
}
44844484

4485-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4485+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
44864486
_mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
44874487
{
44884488
return (__m256i)__builtin_ia32_selectd_256(__U,
44894489
(__v8si)_mm256_rorv_epi32(__A, __B),
44904490
(__v8si)_mm256_setzero_si256());
44914491
}
44924492

4493-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4493+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
44944494
_mm_rorv_epi64 (__m128i __A, __m128i __B)
44954495
{
44964496
return (__m128i)__builtin_elementwise_fshr((__v2du)__A, (__v2du)__A, (__v2du)__B);
44974497
}
44984498

4499-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4499+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
45004500
_mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
45014501
{
45024502
return (__m128i)__builtin_ia32_selectq_128(__U,
45034503
(__v2di)_mm_rorv_epi64(__A, __B),
45044504
(__v2di)__W);
45054505
}
45064506

4507-
static __inline__ __m128i __DEFAULT_FN_ATTRS128
4507+
static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
45084508
_mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
45094509
{
45104510
return (__m128i)__builtin_ia32_selectq_128(__U,
45114511
(__v2di)_mm_rorv_epi64(__A, __B),
45124512
(__v2di)_mm_setzero_si128());
45134513
}
45144514

4515-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4515+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
45164516
_mm256_rorv_epi64 (__m256i __A, __m256i __B)
45174517
{
45184518
return (__m256i)__builtin_elementwise_fshr((__v4du)__A, (__v4du)__A, (__v4du)__B);
45194519
}
45204520

4521-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4521+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
45224522
_mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
45234523
{
45244524
return (__m256i)__builtin_ia32_selectq_256(__U,
45254525
(__v4di)_mm256_rorv_epi64(__A, __B),
45264526
(__v4di)__W);
45274527
}
45284528

4529-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
4529+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
45304530
_mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
45314531
{
45324532
return (__m256i)__builtin_ia32_selectq_256(__U,

‎clang/test/CodeGen/X86/avx512f-builtins.c‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4174,40 +4174,46 @@ __m512i test_mm512_rolv_epi32(__m512i __A, __m512i __B) {
41744174
// CHECK: @llvm.fshl.v16i32
41754175
return _mm512_rolv_epi32(__A, __B);
41764176
}
4177+
TEST_CONSTEXPR(match_v16si(_mm512_rolv_epi32((__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, -32769, 786432, -24577, -4194305, -10485761, 7168, 67108864, 2304, -301989889, -641, -353, -193, -1073741823, 60, 2147483640));
41774178

41784179
__m512i test_mm512_mask_rolv_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {
41794180
// CHECK-LABEL: test_mm512_mask_rolv_epi32
41804181
// CHECK: @llvm.fshl.v16i32
41814182
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
41824183
return _mm512_mask_rolv_epi32(__W, __U, __A, __B);
41834184
}
4185+
TEST_CONSTEXPR(match_v16si(_mm512_mask_rolv_epi32((__m512i)(__v16si){ 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999}, 0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 999, 786432, 999, -4194305, -10485761, 7168, 67108864, 2304, -301989889, -641, -353, -193, -1073741823, 999, 2147483640));
41844186

41854187
__m512i test_mm512_maskz_rolv_epi32(__mmask16 __U, __m512i __A, __m512i __B) {
41864188
// CHECK-LABEL: test_mm512_maskz_rolv_epi32
41874189
// CHECK: @llvm.fshl.v16i32
41884190
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
41894191
return _mm512_maskz_rolv_epi32(__U, __A, __B);
41904192
}
4193+
TEST_CONSTEXPR(match_v16si(_mm512_maskz_rolv_epi32(0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 0, 786432, 0, -4194305, -10485761, 7168, 67108864, 2304, -301989889, -641, -353, -193, -1073741823, 0, 2147483640));
41914194

41924195
__m512i test_mm512_rolv_epi64(__m512i __A, __m512i __B) {
41934196
// CHECK-LABEL: test_mm512_rolv_epi64
41944197
// CHECK: @llvm.fshl.v8i64
41954198
return _mm512_rolv_epi64(__A, __B);
41964199
}
4200+
TEST_CONSTEXPR(match_v8di(_mm512_rolv_epi64((__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 256, -129, 864691128455135232LL, -97, 5764607523034234880LL, -4611686018427387904LL, -25, -15));
41974201

41984202
__m512i test_mm512_mask_rolv_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
41994203
// CHECK-LABEL: test_mm512_mask_rolv_epi64
42004204
// CHECK: @llvm.fshl.v8i64
42014205
// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
42024206
return _mm512_mask_rolv_epi64(__W, __U, __A, __B);
42034207
}
4208+
TEST_CONSTEXPR(match_v8di(_mm512_mask_rolv_epi64((__m512i)(__v8di){ 999, 999, 999, 999, 999, 999, 999, 999}, 0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 256, 999, 999, -97, 5764607523034234880LL, 999, 999, 999));
42044209

42054210
__m512i test_mm512_maskz_rolv_epi64(__mmask8 __U, __m512i __A, __m512i __B) {
42064211
// CHECK-LABEL: test_mm512_maskz_rolv_epi64
42074212
// CHECK: @llvm.fshl.v8i64
42084213
// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
42094214
return _mm512_maskz_rolv_epi64(__U, __A, __B);
42104215
}
4216+
TEST_CONSTEXPR(match_v8di(_mm512_maskz_rolv_epi64(0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 256, 0, 0, -97, 5764607523034234880LL, 0, 0, 0));
42114217

42124218
__m512i test_mm512_ror_epi32(__m512i __A) {
42134219
// CHECK-LABEL: test_mm512_ror_epi32
@@ -4260,40 +4266,46 @@ __m512i test_mm512_rorv_epi32(__m512i __A, __m512i __B) {
42604266
// CHECK: @llvm.fshr.v16i32
42614267
return _mm512_rorv_epi32(__A, __B);
42624268
}
4269+
TEST_CONSTEXPR(match_v16si(_mm512_rorv_epi32((__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, -131073, 49152, -1572865, -16385, -10241, 29360128, 4096, 150994944, -1153, -671088641, -1476395009, 1073741823, 112, -1073741821, -31));
42634270

42644271
__m512i test_mm512_mask_rorv_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {
42654272
// CHECK-LABEL: test_mm512_mask_rorv_epi32
42664273
// CHECK: @llvm.fshr.v16i32
42674274
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
42684275
return _mm512_mask_rorv_epi32(__W, __U, __A, __B);
42694276
}
4277+
TEST_CONSTEXPR(match_v16si(_mm512_mask_rorv_epi32((__m512i)(__v16si){ 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999, 999}, 0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 999, 49152, 999, -16385, -10241, 29360128, 4096, 150994944, -1153, -671088641, -1476395009, 1073741823, 112, 999, -31));
42704278

42714279
__m512i test_mm512_maskz_rorv_epi32(__mmask16 __U, __m512i __A, __m512i __B) {
42724280
// CHECK-LABEL: test_mm512_maskz_rorv_epi32
42734281
// CHECK: @llvm.fshr.v16i32
42744282
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
42754283
return _mm512_maskz_rorv_epi32(__U, __A, __B);
42764284
}
4285+
TEST_CONSTEXPR(match_v16si(_mm512_maskz_rorv_epi32(0xBFF5, (__m512i)(__v16si){ -1, -2, 3, -4, -5, -6, 7, 8, 9, -10, -11, -12, -13, 14, 15, -16}, (__m512i)(__v16si){ 16, 15, -14, 13, -12, -11, 10, -9, 8, -7, 6, 5, 4, -3, 2, -1}), -1, 0, 49152, 0, -16385, -10241, 29360128, 4096, 150994944, -1153, -671088641, -1476395009, 1073741823, 112, 0, -31));
42774286

42784287
__m512i test_mm512_rorv_epi64(__m512i __A, __m512i __B) {
42794288
// CHECK-LABEL: test_mm512_rorv_epi64
42804289
// CHECK: @llvm.fshr.v8i64
42814290
return _mm512_rorv_epi64(__A, __B);
42824291
}
4292+
TEST_CONSTEXPR(match_v8di(_mm512_rorv_epi64((__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 72057594037927936LL, -144115188075855873LL, 192, -1729382256910270465LL, 80, 48, 9223372036854775806LL, 9223372036854775804LL));
42834293

42844294
__m512i test_mm512_mask_rorv_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
42854295
// CHECK-LABEL: test_mm512_mask_rorv_epi64
42864296
// CHECK: @llvm.fshr.v8i64
42874297
// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
42884298
return _mm512_mask_rorv_epi64(__W, __U, __A, __B);
42894299
}
4300+
TEST_CONSTEXPR(match_v8di(_mm512_mask_rorv_epi64((__m512i)(__v8di){ 999, 999, 999, 999, 999, 999, 999, 999}, 0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 72057594037927936LL, 999, 999, -1729382256910270465LL, 80, 999, 999, 999));
42904301

42914302
__m512i test_mm512_maskz_rorv_epi64(__mmask8 __U, __m512i __A, __m512i __B) {
42924303
// CHECK-LABEL: test_mm512_maskz_rorv_epi64
42934304
// CHECK: @llvm.fshr.v8i64
42944305
// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
42954306
return _mm512_maskz_rorv_epi64(__U, __A, __B);
42964307
}
4308+
TEST_CONSTEXPR(match_v8di(_mm512_maskz_rorv_epi64(0x19, (__m512i)(__v8di){ 1, -2, 3, -4, 5, 6, -7, -8}, (__m512i)(__v8di){ 8, 7, -6, 5, -4, -3, 2, 1}), 72057594037927936LL, 0, 0, -1729382256910270465LL, 80, 0, 0, 0));
42974309

42984310
__m512i test_mm512_slli_epi32(__m512i __A) {
42994311
// CHECK-LABEL: test_mm512_slli_epi32

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