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Commit 0b262a3

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Initialize member to default value
Fix lit-test failure and make it easy to get a mir test.
1 parent c4f164e commit 0b262a3

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2 files changed

+7
-7
lines changed

2 files changed

+7
-7
lines changed

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -289,7 +289,7 @@ struct SIMachineFunctionInfo final : public yaml::MachineFunctionInfo {
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290290
unsigned PSInputAddr = 0;
291291
unsigned PSInputEnable = 0;
292-
unsigned MaxMemoryClusterDWords = 0;
292+
unsigned MaxMemoryClusterDWords = DefaultMemoryClusterDWordsLimit;
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SIMode Mode;
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std::optional<FrameIndex> ScavengeFI;
@@ -335,7 +335,7 @@ template <> struct MappingTraits<SIMachineFunctionInfo> {
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YamlIO.mapOptional("psInputAddr", MFI.PSInputAddr, 0u);
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YamlIO.mapOptional("psInputEnable", MFI.PSInputEnable, 0u);
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YamlIO.mapOptional("maxMemoryClusterDWords", MFI.MaxMemoryClusterDWords,
338-
0u);
338+
DefaultMemoryClusterDWordsLimit);
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YamlIO.mapOptional("mode", MFI.Mode, SIMode());
340340
YamlIO.mapOptional("highBitsOf32BitAddress",
341341
MFI.HighBitsOf32BitAddress, 0u);
@@ -492,7 +492,7 @@ class SIMachineFunctionInfo final : public AMDGPUMachineFunction,
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493493
// Maximum number of dwords that can be clusterred during instruction
494494
// scheduler stage.
495-
unsigned MaxMemoryClusterDWords;
495+
unsigned MaxMemoryClusterDWords = DefaultMemoryClusterDWordsLimit;
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mutable std::optional<bool> UsesAGPRs;
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llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@
3939
# FULL-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
4040
# FULL-NEXT: psInputAddr: 0
4141
# FULL-NEXT: psInputEnable: 0
42-
# FULL-NEXT: maxMemoryClusterDWords: 0
42+
# FULL-NEXT: maxMemoryClusterDWords: 8
4343
# FULL-NEXT: mode:
4444
# FULL-NEXT: ieee: true
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# FULL-NEXT: dx10-clamp: true
@@ -144,7 +144,7 @@ body: |
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# FULL-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
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# FULL-NEXT: psInputAddr: 0
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# FULL-NEXT: psInputEnable: 0
147-
# FULL-NEXT: maxMemoryClusterDWords: 0
147+
# FULL-NEXT: maxMemoryClusterDWords: 8
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# FULL-NEXT: mode:
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# FULL-NEXT: ieee: true
150150
# FULL-NEXT: dx10-clamp: true
@@ -220,7 +220,7 @@ body: |
220220
# FULL-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
221221
# FULL-NEXT: psInputAddr: 0
222222
# FULL-NEXT: psInputEnable: 0
223-
# FULL-NEXT: maxMemoryClusterDWords: 0
223+
# FULL-NEXT: maxMemoryClusterDWords: 8
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# FULL-NEXT: mode:
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# FULL-NEXT: ieee: true
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# FULL-NEXT: dx10-clamp: true
@@ -297,7 +297,7 @@ body: |
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# FULL-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
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# FULL-NEXT: psInputAddr: 0
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# FULL-NEXT: psInputEnable: 0
300-
# FULL-NEXT: maxMemoryClusterDWords: 0
300+
# FULL-NEXT: maxMemoryClusterDWords: 8
301301
# FULL-NEXT: mode:
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# FULL-NEXT: ieee: true
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# FULL-NEXT: dx10-clamp: true

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