Skip to content

Commit 0b47f6b

Browse files
committed
[LV] Add test case for #131281
Add test case for #131281.
1 parent 8705e48 commit 0b47f6b

File tree

1 file changed

+29
-0
lines changed

1 file changed

+29
-0
lines changed

llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -241,3 +241,32 @@ loop:
241241
exit:
242242
ret void
243243
}
244+
245+
declare i1 @cond()
246+
247+
; Test case for https://github.com/llvm/llvm-project/issues/131281.
248+
; %add2 is known to not wrap via BTC.
249+
define void @no_signed_wrap_iv_via_btc(ptr %dst, i32 %N) mustprogress {
250+
entry:
251+
%sub = add i32 %N, -100
252+
%sub4 = add i32 %N, -99
253+
br label %outer
254+
255+
outer:
256+
%c = call i1 @cond()
257+
br i1 %c, label %loop, label %exit
258+
259+
loop:
260+
%iv = phi i32 [ 0, %outer ], [ %inc, %loop ]
261+
%add2 = add i32 %sub4, %iv
262+
%add.ext = sext i32 %add2 to i64
263+
%gep.dst = getelementptr i32, ptr %dst, i64 %add.ext
264+
store i32 0, ptr %gep.dst, align 4
265+
%inc = add i32 %iv, 1
266+
%add = add i32 %sub, %inc
267+
%ec = icmp sgt i32 %add, %N
268+
br i1 %ec, label %outer, label %loop
269+
270+
exit:
271+
ret void
272+
}

0 commit comments

Comments
 (0)