Skip to content

Commit 0b4fca5

Browse files
authored
[RISCV][VLOpt] Remove State field from OperandInfo [nfc] (#122160)
We can just use a std::optional to wrap the operand info instead. The state field is confusing as we have a "partially known" state where EEW is known and EMUL is nullopt, but it's still "Known".
1 parent f9c2377 commit 0b4fca5

File tree

1 file changed

+31
-34
lines changed

1 file changed

+31
-34
lines changed

llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

Lines changed: 31 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -79,11 +79,6 @@ static bool isVectorRegClass(Register R, const MachineRegisterInfo *MRI) {
7979

8080
/// Represents the EMUL and EEW of a MachineOperand.
8181
struct OperandInfo {
82-
enum class State {
83-
Unknown,
84-
Known,
85-
} S;
86-
8782
// Represent as 1,2,4,8, ... and fractional indicator. This is because
8883
// EMUL can take on values that don't map to RISCVII::VLMUL values exactly.
8984
// For example, a mask operand can have an EMUL less than MF8.
@@ -92,41 +87,32 @@ struct OperandInfo {
9287
unsigned Log2EEW;
9388

9489
OperandInfo(RISCVII::VLMUL EMUL, unsigned Log2EEW)
95-
: S(State::Known), EMUL(RISCVVType::decodeVLMUL(EMUL)), Log2EEW(Log2EEW) {
96-
}
90+
: EMUL(RISCVVType::decodeVLMUL(EMUL)), Log2EEW(Log2EEW) {}
9791

9892
OperandInfo(std::pair<unsigned, bool> EMUL, unsigned Log2EEW)
99-
: S(State::Known), EMUL(EMUL), Log2EEW(Log2EEW) {}
100-
101-
OperandInfo(unsigned Log2EEW) : S(State::Known), Log2EEW(Log2EEW) {}
93+
: EMUL(EMUL), Log2EEW(Log2EEW) {}
10294

103-
OperandInfo() : S(State::Unknown) {}
95+
OperandInfo(unsigned Log2EEW) : Log2EEW(Log2EEW) {}
10496

105-
bool isUnknown() const { return S == State::Unknown; }
106-
bool isKnown() const { return S == State::Known; }
97+
OperandInfo() = delete;
10798

10899
static bool EMULAndEEWAreEqual(const OperandInfo &A, const OperandInfo &B) {
109-
assert(A.isKnown() && B.isKnown() && "Both operands must be known");
110-
111100
return A.Log2EEW == B.Log2EEW && A.EMUL->first == B.EMUL->first &&
112101
A.EMUL->second == B.EMUL->second;
113102
}
114103

115104
static bool EEWAreEqual(const OperandInfo &A, const OperandInfo &B) {
116-
assert(A.isKnown() && B.isKnown() && "Both operands must be known");
117105
return A.Log2EEW == B.Log2EEW;
118106
}
119107

120108
void print(raw_ostream &OS) const {
121-
if (isUnknown()) {
122-
OS << "Unknown";
123-
return;
124-
}
125-
assert(EMUL && "Expected EMUL to have value");
126-
OS << "EMUL: m";
127-
if (EMUL->second)
128-
OS << "f";
129-
OS << EMUL->first;
109+
if (EMUL) {
110+
OS << "EMUL: m";
111+
if (EMUL->second)
112+
OS << "f";
113+
OS << EMUL->first;
114+
} else
115+
OS << "EMUL: unknown\n";
130116
OS << ", EEW: " << (1 << Log2EEW);
131117
}
132118
};
@@ -137,6 +123,16 @@ static raw_ostream &operator<<(raw_ostream &OS, const OperandInfo &OI) {
137123
return OS;
138124
}
139125

126+
LLVM_ATTRIBUTE_UNUSED
127+
static raw_ostream &operator<<(raw_ostream &OS,
128+
const std::optional<OperandInfo> &OI) {
129+
if (OI)
130+
OI->print(OS);
131+
else
132+
OS << "nullopt";
133+
return OS;
134+
}
135+
140136
namespace llvm {
141137
namespace RISCVVType {
142138
/// Return EMUL = (EEW / SEW) * LMUL where EEW comes from Log2EEW and LMUL and
@@ -715,20 +711,20 @@ getOperandLog2EEW(const MachineOperand &MO, const MachineRegisterInfo *MRI) {
715711
}
716712

717713
default:
718-
return {};
714+
return std::nullopt;
719715
}
720716
}
721717

722-
static OperandInfo getOperandInfo(const MachineOperand &MO,
723-
const MachineRegisterInfo *MRI) {
718+
static std::optional<OperandInfo>
719+
getOperandInfo(const MachineOperand &MO, const MachineRegisterInfo *MRI) {
724720
const MachineInstr &MI = *MO.getParent();
725721
const RISCVVPseudosTable::PseudoInfo *RVV =
726722
RISCVVPseudosTable::getPseudoInfo(MI.getOpcode());
727723
assert(RVV && "Could not find MI in PseudoTable");
728724

729725
std::optional<unsigned> Log2EEW = getOperandLog2EEW(MO, MRI);
730726
if (!Log2EEW)
731-
return {};
727+
return std::nullopt;
732728

733729
switch (RVV->BaseInstr) {
734730
// Vector Reduction Operations
@@ -1185,9 +1181,10 @@ std::optional<MachineOperand> RISCVVLOptimizer::checkUsers(MachineInstr &MI) {
11851181
return std::nullopt;
11861182
}
11871183

1188-
OperandInfo ConsumerInfo = getOperandInfo(UserOp, MRI);
1189-
OperandInfo ProducerInfo = getOperandInfo(MI.getOperand(0), MRI);
1190-
if (ConsumerInfo.isUnknown() || ProducerInfo.isUnknown()) {
1184+
std::optional<OperandInfo> ConsumerInfo = getOperandInfo(UserOp, MRI);
1185+
std::optional<OperandInfo> ProducerInfo =
1186+
getOperandInfo(MI.getOperand(0), MRI);
1187+
if (!ConsumerInfo || !ProducerInfo) {
11911188
LLVM_DEBUG(dbgs() << " Abort due to unknown operand information.\n");
11921189
LLVM_DEBUG(dbgs() << " ConsumerInfo is: " << ConsumerInfo << "\n");
11931190
LLVM_DEBUG(dbgs() << " ProducerInfo is: " << ProducerInfo << "\n");
@@ -1198,9 +1195,9 @@ std::optional<MachineOperand> RISCVVLOptimizer::checkUsers(MachineInstr &MI) {
11981195
// compatible. Otherwise, the EMUL *and* EEW must be compatible.
11991196
bool IsVectorOpUsedAsScalarOp = isVectorOpUsedAsScalarOp(UserOp);
12001197
if ((IsVectorOpUsedAsScalarOp &&
1201-
!OperandInfo::EEWAreEqual(ConsumerInfo, ProducerInfo)) ||
1198+
!OperandInfo::EEWAreEqual(*ConsumerInfo, *ProducerInfo)) ||
12021199
(!IsVectorOpUsedAsScalarOp &&
1203-
!OperandInfo::EMULAndEEWAreEqual(ConsumerInfo, ProducerInfo))) {
1200+
!OperandInfo::EMULAndEEWAreEqual(*ConsumerInfo, *ProducerInfo))) {
12041201
LLVM_DEBUG(
12051202
dbgs()
12061203
<< " Abort due to incompatible information for EMUL or EEW.\n");

0 commit comments

Comments
 (0)