@@ -594,6 +594,27 @@ SDValue XtensaTargetLowering::LowerSELECT_CC(SDValue Op,
594594 FalseValue, TargetCC);
595595}
596596
597+ SDValue XtensaTargetLowering::LowerRETURNADDR (SDValue Op,
598+ SelectionDAG &DAG) const {
599+ // This nodes represent llvm.returnaddress on the DAG.
600+ // It takes one operand, the index of the return address to return.
601+ // An index of zero corresponds to the current function's return address.
602+ // An index of one to the parent's return address, and so on.
603+ // Depths > 0 not supported yet!
604+ if (Op.getConstantOperandVal (0 ) != 0 )
605+ return SDValue ();
606+
607+ MachineFunction &MF = DAG.getMachineFunction ();
608+ MachineFrameInfo &MFI = MF.getFrameInfo ();
609+ EVT VT = Op.getValueType ();
610+ MFI.setReturnAddressIsTaken (true );
611+
612+ // Return RA, which contains the return address. Mark it an implicit
613+ // live-in.
614+ Register RA = MF.addLiveIn (Xtensa::A0, getRegClassFor (MVT::i32 ));
615+ return DAG.getCopyFromReg (DAG.getEntryNode (), SDLoc (Op), RA, VT);
616+ }
617+
597618SDValue XtensaTargetLowering::LowerImmediate (SDValue Op,
598619 SelectionDAG &DAG) const {
599620 const ConstantSDNode *CN = cast<ConstantSDNode>(Op);
@@ -722,6 +743,28 @@ SDValue XtensaTargetLowering::LowerSTACKRESTORE(SDValue Op,
722743 Op.getOperand (1 ));
723744}
724745
746+ SDValue XtensaTargetLowering::LowerFRAMEADDR (SDValue Op,
747+ SelectionDAG &DAG) const {
748+ // This nodes represent llvm.frameaddress on the DAG.
749+ // It takes one operand, the index of the frame address to return.
750+ // An index of zero corresponds to the current function's frame address.
751+ // An index of one to the parent's frame address, and so on.
752+ // Depths > 0 not supported yet!
753+ if (Op.getConstantOperandVal (0 ) != 0 )
754+ return SDValue ();
755+
756+ MachineFunction &MF = DAG.getMachineFunction ();
757+ MachineFrameInfo &MFI = MF.getFrameInfo ();
758+ MFI.setFrameAddressIsTaken (true );
759+ EVT VT = Op.getValueType ();
760+ SDLoc DL (Op);
761+
762+ Register FrameRegister = Subtarget.getRegisterInfo ()->getFrameRegister (MF);
763+ SDValue FrameAddr =
764+ DAG.getCopyFromReg (DAG.getEntryNode (), DL, FrameRegister, VT);
765+ return FrameAddr;
766+ }
767+
725768SDValue XtensaTargetLowering::LowerDYNAMIC_STACKALLOC (SDValue Op,
726769 SelectionDAG &DAG) const {
727770 SDValue Chain = Op.getOperand (0 ); // Legalize the chain.
@@ -867,6 +910,8 @@ SDValue XtensaTargetLowering::LowerOperation(SDValue Op,
867910 return LowerBR_JT (Op, DAG);
868911 case ISD::Constant:
869912 return LowerImmediate (Op, DAG);
913+ case ISD::RETURNADDR:
914+ return LowerRETURNADDR (Op, DAG);
870915 case ISD::GlobalAddress:
871916 return LowerGlobalAddress (Op, DAG);
872917 case ISD::BlockAddress:
@@ -883,6 +928,8 @@ SDValue XtensaTargetLowering::LowerOperation(SDValue Op,
883928 return LowerSTACKSAVE (Op, DAG);
884929 case ISD::STACKRESTORE:
885930 return LowerSTACKRESTORE (Op, DAG);
931+ case ISD::FRAMEADDR:
932+ return LowerFRAMEADDR (Op, DAG);
886933 case ISD::DYNAMIC_STACKALLOC:
887934 return LowerDYNAMIC_STACKALLOC (Op, DAG);
888935 case ISD::SHL_PARTS:
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