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davemgreendavemgreen
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[VectorCombine] Add support for zext/sext/trunc to shuffleToIdentity
This is one of the simple additions to shuffleToIdentity that help it look through intermediate zext/sext instructions. The other change here is the removal of a check that both operands of the original shuffle are instructions, which is a relic from a previous version.
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2 files changed

+26
-62
lines changed

2 files changed

+26
-62
lines changed

‎llvm/lib/Transforms/Vectorize/VectorCombine.cpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1742,6 +1742,9 @@ static Value *generateNewInstTree(ArrayRef<InstLane> Item, FixedVectorType *Ty,
17421742
if (auto *BI = dyn_cast<BinaryOperator>(I))
17431743
return Builder.CreateBinOp((Instruction::BinaryOps)BI->getOpcode(), Ops[0],
17441744
Ops[1]);
1745+
if (auto CI = dyn_cast<CastInst>(I))
1746+
return Builder.CreateCast((Instruction::CastOps)CI->getOpcode(), Ops[0],
1747+
DstTy);
17451748
if (II)
17461749
return Builder.CreateIntrinsic(DstTy, II->getIntrinsicID(), Ops);
17471750
assert(isa<UnaryInstruction>(I) && "Unexpected instruction type in Generate");
@@ -1753,8 +1756,7 @@ static Value *generateNewInstTree(ArrayRef<InstLane> Item, FixedVectorType *Ty,
17531756
// do so.
17541757
bool VectorCombine::foldShuffleToIdentity(Instruction &I) {
17551758
auto *Ty = dyn_cast<FixedVectorType>(I.getType());
1756-
if (!Ty || !isa<Instruction>(I.getOperand(0)) ||
1757-
!isa<Instruction>(I.getOperand(1)))
1759+
if (!Ty)
17581760
return false;
17591761

17601762
SmallVector<InstLane> Start(Ty->getNumElements());
@@ -1825,7 +1827,7 @@ bool VectorCombine::foldShuffleToIdentity(Instruction &I) {
18251827
!cast<BinaryOperator>(FrontV)->isIntDivRem()) {
18261828
Worklist.push_back(generateInstLaneVectorFromOperand(Item, 0));
18271829
Worklist.push_back(generateInstLaneVectorFromOperand(Item, 1));
1828-
} else if (isa<UnaryOperator>(FrontV)) {
1830+
} else if (isa<UnaryOperator, TruncInst, ZExtInst, SExtInst>(FrontV)) {
18291831
Worklist.push_back(generateInstLaneVectorFromOperand(Item, 0));
18301832
} else if (auto *II = dyn_cast<IntrinsicInst>(FrontV);
18311833
II && isTriviallyVectorizable(II->getIntrinsicID())) {

‎llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll‎

Lines changed: 21 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -15,9 +15,7 @@ define <8 x i8> @trivial(<8 x i8> %a) {
1515

1616
define <4 x i32> @add_same_operands(<4 x i32> %x) {
1717
; CHECK-LABEL: @add_same_operands(
18-
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
19-
; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[SHUF]], [[SHUF]]
20-
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i32> [[ADD]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
18+
; CHECK-NEXT: [[REVSHUF:%.*]] = add <4 x i32> [[X:%.*]], [[X]]
2119
; CHECK-NEXT: ret <4 x i32> [[REVSHUF]]
2220
;
2321
%shuf = shufflevector <4 x i32> %x, <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
@@ -372,8 +370,7 @@ define <8 x i8> @inner_shuffle(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) {
372370
define <4 x i32> @extrause_add_same_operands(<4 x i32> %x) {
373371
; CHECK-LABEL: @extrause_add_same_operands(
374372
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
375-
; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[SHUF]], [[SHUF]]
376-
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i32> [[ADD]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
373+
; CHECK-NEXT: [[REVSHUF:%.*]] = add <4 x i32> [[X]], [[X]]
377374
; CHECK-NEXT: [[ADD2:%.*]] = add <4 x i32> [[SHUF]], [[REVSHUF]]
378375
; CHECK-NEXT: ret <4 x i32> [[ADD2]]
379376
;
@@ -543,9 +540,7 @@ define <8 x half> @fma(<8 x half> %a, <8 x half> %b, <8 x half> %c) {
543540

544541
define <4 x i64> @single_zext(<4 x i32> %x) {
545542
; CHECK-LABEL: @single_zext(
546-
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
547-
; CHECK-NEXT: [[ZEXT:%.*]] = zext <4 x i32> [[SHUF]] to <4 x i64>
548-
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i64> [[ZEXT]], <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
543+
; CHECK-NEXT: [[REVSHUF:%.*]] = zext <4 x i32> [[X:%.*]] to <4 x i64>
549544
; CHECK-NEXT: ret <4 x i64> [[REVSHUF]]
550545
;
551546
%shuf = shufflevector <4 x i32> %x, <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
@@ -600,19 +595,10 @@ define <8 x i16> @not_bitcast2(<4 x i32> %x, <8 x i16> %y) {
600595

601596
define void @exttrunc(<8 x i32> %a, <8 x i32> %b, ptr %p) {
602597
; CHECK-LABEL: @exttrunc(
603-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i32> [[A:%.*]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
604-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i32> [[A]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
605-
; CHECK-NEXT: [[BB:%.*]] = shufflevector <8 x i32> [[B:%.*]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
606-
; CHECK-NEXT: [[BT:%.*]] = shufflevector <8 x i32> [[B]], <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
607-
; CHECK-NEXT: [[AB1:%.*]] = zext <4 x i32> [[AB]] to <4 x i64>
608-
; CHECK-NEXT: [[AT1:%.*]] = zext <4 x i32> [[AT]] to <4 x i64>
609-
; CHECK-NEXT: [[BB1:%.*]] = sext <4 x i32> [[BB]] to <4 x i64>
610-
; CHECK-NEXT: [[BT1:%.*]] = sext <4 x i32> [[BT]] to <4 x i64>
611-
; CHECK-NEXT: [[ABB:%.*]] = add <4 x i64> [[AB1]], [[BB1]]
612-
; CHECK-NEXT: [[ABT:%.*]] = add <4 x i64> [[AT1]], [[BT1]]
613-
; CHECK-NEXT: [[ABB1:%.*]] = trunc <4 x i64> [[ABB]] to <4 x i32>
614-
; CHECK-NEXT: [[ABT1:%.*]] = trunc <4 x i64> [[ABT]] to <4 x i32>
615-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB1]], <4 x i32> [[ABT1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
598+
; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i32> [[A:%.*]] to <8 x i64>
599+
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i32> [[B:%.*]] to <8 x i64>
600+
; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i64> [[TMP1]], [[TMP2]]
601+
; CHECK-NEXT: [[R:%.*]] = trunc <8 x i64> [[TMP3]] to <8 x i32>
616602
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
617603
; CHECK-NEXT: ret void
618604
;
@@ -635,17 +621,9 @@ define void @exttrunc(<8 x i32> %a, <8 x i32> %b, ptr %p) {
635621

636622
define void @zext(<8 x i16> %a, <8 x i16> %b, ptr %p) {
637623
; CHECK-LABEL: @zext(
638-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
639-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
640-
; CHECK-NEXT: [[BB:%.*]] = shufflevector <8 x i16> [[B:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
641-
; CHECK-NEXT: [[BT:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
642-
; CHECK-NEXT: [[AB1:%.*]] = zext <4 x i16> [[AB]] to <4 x i32>
643-
; CHECK-NEXT: [[AT1:%.*]] = zext <4 x i16> [[AT]] to <4 x i32>
644-
; CHECK-NEXT: [[BB1:%.*]] = zext <4 x i16> [[BB]] to <4 x i32>
645-
; CHECK-NEXT: [[BT1:%.*]] = zext <4 x i16> [[BT]] to <4 x i32>
646-
; CHECK-NEXT: [[ABB:%.*]] = add <4 x i32> [[AB1]], [[BB1]]
647-
; CHECK-NEXT: [[ABT:%.*]] = add <4 x i32> [[AT1]], [[BT1]]
648-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB]], <4 x i32> [[ABT]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
624+
; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i16> [[A:%.*]] to <8 x i32>
625+
; CHECK-NEXT: [[TMP2:%.*]] = zext <8 x i16> [[B:%.*]] to <8 x i32>
626+
; CHECK-NEXT: [[R:%.*]] = add <8 x i32> [[TMP1]], [[TMP2]]
649627
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
650628
; CHECK-NEXT: ret void
651629
;
@@ -666,17 +644,9 @@ define void @zext(<8 x i16> %a, <8 x i16> %b, ptr %p) {
666644

667645
define void @sext(<8 x i16> %a, <8 x i16> %b, ptr %p) {
668646
; CHECK-LABEL: @sext(
669-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i16> [[A:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
670-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i16> [[A]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
671-
; CHECK-NEXT: [[BB:%.*]] = shufflevector <8 x i16> [[B:%.*]], <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
672-
; CHECK-NEXT: [[BT:%.*]] = shufflevector <8 x i16> [[B]], <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
673-
; CHECK-NEXT: [[AB1:%.*]] = sext <4 x i16> [[AB]] to <4 x i32>
674-
; CHECK-NEXT: [[AT1:%.*]] = sext <4 x i16> [[AT]] to <4 x i32>
675-
; CHECK-NEXT: [[BB1:%.*]] = sext <4 x i16> [[BB]] to <4 x i32>
676-
; CHECK-NEXT: [[BT1:%.*]] = sext <4 x i16> [[BT]] to <4 x i32>
677-
; CHECK-NEXT: [[ABB:%.*]] = add <4 x i32> [[AB1]], [[BB1]]
678-
; CHECK-NEXT: [[ABT:%.*]] = add <4 x i32> [[AT1]], [[BT1]]
679-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB]], <4 x i32> [[ABT]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
647+
; CHECK-NEXT: [[TMP1:%.*]] = sext <8 x i16> [[A:%.*]] to <8 x i32>
648+
; CHECK-NEXT: [[TMP2:%.*]] = sext <8 x i16> [[B:%.*]] to <8 x i32>
649+
; CHECK-NEXT: [[R:%.*]] = add <8 x i32> [[TMP1]], [[TMP2]]
680650
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
681651
; CHECK-NEXT: ret void
682652
;
@@ -735,11 +705,7 @@ define void @zext_types(<8 x i16> %a, <8 x i32> %b, ptr %p) {
735705

736706
define void @trunc(<8 x i64> %a, <8 x i64> %b, ptr %p) {
737707
; CHECK-LABEL: @trunc(
738-
; CHECK-NEXT: [[AB:%.*]] = shufflevector <8 x i64> [[A:%.*]], <8 x i64> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
739-
; CHECK-NEXT: [[AT:%.*]] = shufflevector <8 x i64> [[A]], <8 x i64> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
740-
; CHECK-NEXT: [[ABB1:%.*]] = trunc <4 x i64> [[AB]] to <4 x i32>
741-
; CHECK-NEXT: [[ABT1:%.*]] = trunc <4 x i64> [[AT]] to <4 x i32>
742-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i32> [[ABB1]], <4 x i32> [[ABT1]], <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
708+
; CHECK-NEXT: [[R:%.*]] = trunc <8 x i64> [[A:%.*]] to <8 x i32>
743709
; CHECK-NEXT: store <8 x i32> [[R]], ptr [[P:%.*]], align 32
744710
; CHECK-NEXT: ret void
745711
;
@@ -754,10 +720,8 @@ define void @trunc(<8 x i64> %a, <8 x i64> %b, ptr %p) {
754720

755721
define <4 x i64> @zext_chain(<4 x i16> %x) {
756722
; CHECK-LABEL: @zext_chain(
757-
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i16> [[X:%.*]], <4 x i16> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
758-
; CHECK-NEXT: [[ZEXT:%.*]] = zext <4 x i16> [[SHUF]] to <4 x i32>
759-
; CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i32> [[ZEXT]] to <4 x i64>
760-
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i64> [[SEXT]], <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
723+
; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i16> [[X:%.*]] to <4 x i32>
724+
; CHECK-NEXT: [[REVSHUF:%.*]] = sext <4 x i32> [[TMP1]] to <4 x i64>
761725
; CHECK-NEXT: ret <4 x i64> [[REVSHUF]]
762726
;
763727
%shuf = shufflevector <4 x i16> %x, <4 x i16> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
@@ -958,13 +922,11 @@ entry:
958922

959923
define <4 x i8> @singleop(<4 x i8> %a, <4 x i8> %b) {
960924
; CHECK-LABEL: @singleop(
961-
; CHECK-NEXT: [[A1:%.*]] = shufflevector <4 x i8> [[A:%.*]], <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
962-
; CHECK-NEXT: [[B1:%.*]] = shufflevector <4 x i8> [[B:%.*]], <4 x i8> poison, <4 x i32> zeroinitializer
963-
; CHECK-NEXT: [[A2:%.*]] = zext <4 x i8> [[A1]] to <4 x i16>
964-
; CHECK-NEXT: [[B2:%.*]] = zext <4 x i8> [[B1]] to <4 x i16>
965-
; CHECK-NEXT: [[AB:%.*]] = add <4 x i16> [[A2]], [[B2]]
966-
; CHECK-NEXT: [[T:%.*]] = trunc <4 x i16> [[AB]] to <4 x i8>
967-
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i8> [[T]], <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
925+
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i8> [[B:%.*]], <4 x i8> poison, <4 x i32> zeroinitializer
926+
; CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i8> [[A:%.*]] to <4 x i16>
927+
; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP1]] to <4 x i16>
928+
; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i16> [[TMP2]], [[TMP3]]
929+
; CHECK-NEXT: [[R:%.*]] = trunc <4 x i16> [[TMP4]] to <4 x i8>
968930
; CHECK-NEXT: ret <4 x i8> [[R]]
969931
;
970932
%a1 = shufflevector <4 x i8> %a, <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>

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