Skip to content

Commit 0c09869

Browse files
MaskRayMaskRay
committed
ARC,M68k: Adapt #158240 
1 parent 242d0c7 commit 0c09869

File tree

4 files changed

+15
-23
lines changed

4 files changed

+15
-23
lines changed

‎llvm/lib/Target/ARC/ARCInstrInfo.cpp‎

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -294,8 +294,7 @@ void ARCInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
294294

295295
void ARCInstrInfo::storeRegToStackSlot(
296296
MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register SrcReg,
297-
bool IsKill, int FrameIndex, const TargetRegisterClass *RC,
298-
const TargetRegisterInfo *TRI, Register VReg,
297+
bool IsKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg,
299298
MachineInstr::MIFlag Flags) const {
300299
DebugLoc DL = MBB.findDebugLoc(I);
301300
MachineFunction &MF = *MBB.getParent();
@@ -307,11 +306,11 @@ void ARCInstrInfo::storeRegToStackSlot(
307306
MFI.getObjectAlign(FrameIndex));
308307

309308
assert(MMO && "Couldn't get MachineMemOperand for store to stack.");
310-
assert(TRI->getSpillSize(*RC) == 4 &&
309+
assert(TRI.getSpillSize(*RC) == 4 &&
311310
"Only support 4-byte stores to stack now.");
312311
assert(ARC::GPR32RegClass.hasSubClassEq(RC) &&
313312
"Only support GPR32 stores to stack now.");
314-
LLVM_DEBUG(dbgs() << "Created store reg=" << printReg(SrcReg, TRI)
313+
LLVM_DEBUG(dbgs() << "Created store reg=" << printReg(SrcReg, &TRI)
315314
<< " to FrameIndex=" << FrameIndex << "\n");
316315
BuildMI(MBB, I, DL, get(ARC::ST_rs9))
317316
.addReg(SrcReg, getKillRegState(IsKill))
@@ -324,7 +323,6 @@ void ARCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
324323
MachineBasicBlock::iterator I,
325324
Register DestReg, int FrameIndex,
326325
const TargetRegisterClass *RC,
327-
const TargetRegisterInfo *TRI,
328326
Register VReg,
329327
MachineInstr::MIFlag Flags) const {
330328
DebugLoc DL = MBB.findDebugLoc(I);
@@ -336,11 +334,11 @@ void ARCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
336334
MFI.getObjectAlign(FrameIndex));
337335

338336
assert(MMO && "Couldn't get MachineMemOperand for store to stack.");
339-
assert(TRI->getSpillSize(*RC) == 4 &&
337+
assert(TRI.getSpillSize(*RC) == 4 &&
340338
"Only support 4-byte loads from stack now.");
341339
assert(ARC::GPR32RegClass.hasSubClassEq(RC) &&
342340
"Only support GPR32 stores to stack now.");
343-
LLVM_DEBUG(dbgs() << "Created load reg=" << printReg(DestReg, TRI)
341+
LLVM_DEBUG(dbgs() << "Created load reg=" << printReg(DestReg, &TRI)
344342
<< " from FrameIndex=" << FrameIndex << "\n");
345343
BuildMI(MBB, I, DL, get(ARC::LD_rs9))
346344
.addReg(DestReg, RegState::Define)

‎llvm/lib/Target/ARC/ARCInstrInfo.h‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -70,14 +70,12 @@ class ARCInstrInfo : public ARCGenInstrInfo {
7070

7171
void storeRegToStackSlot(
7272
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg,
73-
bool IsKill, int FrameIndex, const TargetRegisterClass *RC,
74-
const TargetRegisterInfo *TRI, Register VReg,
73+
bool IsKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg,
7574
MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
7675

7776
void loadRegFromStackSlot(
7877
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg,
79-
int FrameIndex, const TargetRegisterClass *RC,
80-
const TargetRegisterInfo *TRI, Register VReg,
78+
int FrameIndex, const TargetRegisterClass *RC, Register VReg,
8179
MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
8280

8381
bool

‎llvm/lib/Target/M68k/M68kInstrInfo.cpp‎

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ using namespace llvm;
4343
void M68kInstrInfo::anchor() {}
4444

4545
M68kInstrInfo::M68kInstrInfo(const M68kSubtarget &STI)
46-
: M68kGenInstrInfo(STI, M68k::ADJCALLSTACKDOWN, M68k::ADJCALLSTACKUP, 0,
46+
: M68kGenInstrInfo(STI, RI, M68k::ADJCALLSTACKDOWN, M68k::ADJCALLSTACKUP, 0,
4747
M68k::RET),
4848
Subtarget(STI), RI(STI) {}
4949

@@ -838,15 +838,14 @@ bool M68kInstrInfo::getStackSlotRange(const TargetRegisterClass *RC,
838838

839839
void M68kInstrInfo::storeRegToStackSlot(
840840
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg,
841-
bool IsKill, int FrameIndex, const TargetRegisterClass *RC,
842-
const TargetRegisterInfo *TRI, Register VReg,
841+
bool IsKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg,
843842
MachineInstr::MIFlag Flags) const {
844843
const MachineFrameInfo &MFI = MBB.getParent()->getFrameInfo();
845-
assert(MFI.getObjectSize(FrameIndex) >= TRI->getSpillSize(*RC) &&
844+
assert(MFI.getObjectSize(FrameIndex) >= TRI.getSpillSize(*RC) &&
846845
"Stack slot is too small to store");
847846
(void)MFI;
848847

849-
unsigned Opc = getStoreRegOpcode(SrcReg, RC, TRI, Subtarget);
848+
unsigned Opc = getStoreRegOpcode(SrcReg, RC, &TRI, Subtarget);
850849
DebugLoc DL = MBB.findDebugLoc(MI);
851850
// (0,FrameIndex) <- $reg
852851
M68k::addFrameReference(BuildMI(MBB, MI, DL, get(Opc)), FrameIndex)
@@ -857,15 +856,14 @@ void M68kInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
857856
MachineBasicBlock::iterator MI,
858857
Register DstReg, int FrameIndex,
859858
const TargetRegisterClass *RC,
860-
const TargetRegisterInfo *TRI,
861859
Register VReg,
862860
MachineInstr::MIFlag Flags) const {
863861
const MachineFrameInfo &MFI = MBB.getParent()->getFrameInfo();
864-
assert(MFI.getObjectSize(FrameIndex) >= TRI->getSpillSize(*RC) &&
862+
assert(MFI.getObjectSize(FrameIndex) >= TRI.getSpillSize(*RC) &&
865863
"Stack slot is too small to load");
866864
(void)MFI;
867865

868-
unsigned Opc = getLoadRegOpcode(DstReg, RC, TRI, Subtarget);
866+
unsigned Opc = getLoadRegOpcode(DstReg, RC, &TRI, Subtarget);
869867
DebugLoc DL = MBB.findDebugLoc(MI);
870868
M68k::addFrameReference(BuildMI(MBB, MI, DL, get(Opc), DstReg), FrameIndex);
871869
}

‎llvm/lib/Target/M68k/M68kInstrInfo.h‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -280,14 +280,12 @@ class M68kInstrInfo : public M68kGenInstrInfo {
280280

281281
void storeRegToStackSlot(
282282
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg,
283-
bool IsKill, int FrameIndex, const TargetRegisterClass *RC,
284-
const TargetRegisterInfo *TRI, Register VReg,
283+
bool IsKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg,
285284
MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
286285

287286
void loadRegFromStackSlot(
288287
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg,
289-
int FrameIndex, const TargetRegisterClass *RC,
290-
const TargetRegisterInfo *TRI, Register VReg,
288+
int FrameIndex, const TargetRegisterClass *RC, Register VReg,
291289
MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
292290

293291
bool expandPostRAPseudo(MachineInstr &MI) const override;

0 commit comments

Comments
 (0)