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AZero13AZero13
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[InstCombine] Pre-commit tests (NFC)
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‎llvm/test/Transforms/InstCombine/saturating-add-sub.ll‎

Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2350,4 +2350,65 @@ define i8 @fold_add_umax_to_usub_multiuse(i8 %a) {
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ret i8 %sel
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}
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define i32 @uadd_with_zext(i32 %x, i32 %y) {
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; CHECK-LABEL: @uadd_with_zext(
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; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV]], [[CONV1]]
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; CHECK-NEXT: [[COND1:%.*]] = call i64 @llvm.umin.i64(i64 [[ADD]], i64 4294967295)
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; CHECK-NEXT: [[COND:%.*]] = trunc nuw i64 [[COND1]] to i32
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; CHECK-NEXT: ret i32 [[COND]]
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;
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%conv = zext i32 %x to i64
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%conv1 = zext i32 %y to i64
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%add = add i64 %conv, %conv1
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%cmp = icmp ugt i64 %add, 4294967295
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%conv4 = trunc i64 %add to i32
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%cond = select i1 %cmp, i32 -1, i32 %conv4
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ret i32 %cond
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}
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define i32 @uadd_with_zext_multi_use(i32 %x, i32 %y) {
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; CHECK-LABEL: @uadd_with_zext_multi_use(
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; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV]], [[CONV1]]
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; CHECK-NEXT: [[TRUNCADD:%.*]] = trunc i64 [[ADD]] to i32
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; CHECK-NEXT: call void @usei32(i32 [[TRUNCADD]])
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; CHECK-NEXT: [[COND1:%.*]] = call i64 @llvm.umin.i64(i64 [[ADD]], i64 4294967295)
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; CHECK-NEXT: [[COND:%.*]] = trunc nuw i64 [[COND1]] to i32
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; CHECK-NEXT: ret i32 [[COND]]
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;
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%conv = zext i32 %x to i64
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%conv1 = zext i32 %y to i64
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%add = add i64 %conv, %conv1
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%truncAdd = trunc i64 %add to i32
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call void @usei32(i32 %truncAdd)
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%cmp = icmp ugt i64 %add, 4294967295
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%cond = select i1 %cmp, i32 -1, i32 %truncAdd
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ret i32 %cond
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}
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define i32 @uadd_with_zext_neg_use(i32 %x, i32 %y) {
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; CHECK-LABEL: @uadd_with_zext_neg_use(
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; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV]], [[CONV1]]
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; CHECK-NEXT: call void @usei64(i64 [[ADD]])
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; CHECK-NEXT: [[COND1:%.*]] = call i64 @llvm.umin.i64(i64 [[ADD]], i64 4294967295)
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; CHECK-NEXT: [[COND:%.*]] = trunc nuw i64 [[COND1]] to i32
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; CHECK-NEXT: ret i32 [[COND]]
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;
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%conv = zext i32 %x to i64
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%conv1 = zext i32 %y to i64
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%add = add i64 %conv, %conv1
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call void @usei64(i64 %add)
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%cmp = icmp ugt i64 %add, 4294967295
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%conv4 = trunc i64 %add to i32
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%cond = select i1 %cmp, i32 -1, i32 %conv4
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ret i32 %cond
2410+
}
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declare void @usei64(i64)
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declare void @usei32(i32)
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declare void @usei8(i8)

‎llvm/test/Transforms/InstCombine/uadd-with-overflow.ll‎

Lines changed: 76 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -147,3 +147,79 @@ define { <2 x i32>, <2 x i1> } @fold_simple_splat_constant_with_or_fail(<2 x i32
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%b = tail call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> %a, <2 x i32> <i32 30, i32 30>)
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ret { <2 x i32>, <2 x i1> } %b
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}
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define i32 @uadd_with_zext(i32 %x, i32 %y) {
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; CHECK-LABEL: @uadd_with_zext(
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; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV]], [[CONV1]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i64 [[ADD]], 4294967295
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; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[COND]]
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;
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%conv = zext i32 %x to i64
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%conv1 = zext i32 %y to i64
162+
%add = add i64 %conv, %conv1
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%cmp = icmp ugt i64 %add, 4294967295
164+
%cond = zext i1 %cmp to i32
165+
ret i32 %cond
166+
}
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define i32 @uadd_with_zext_use_and(i32 %x, i32 %y) {
169+
; CHECK-LABEL: @uadd_with_zext_use_and(
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; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV]], [[CONV1]]
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; CHECK-NEXT: [[AND:%.*]] = and i64 [[ADD]], 65535
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; CHECK-NEXT: call void @usei64(i64 [[AND]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i64 [[ADD]], 4294967295
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; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[COND]]
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;
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%conv = zext i32 %x to i64
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%conv1 = zext i32 %y to i64
181+
%add = add i64 %conv, %conv1
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%and = and i64 %add, 65535
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call void @usei64(i64 %and)
184+
%cmp = icmp ugt i64 %add, 4294967295
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%cond = zext i1 %cmp to i32
186+
ret i32 %cond
187+
}
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189+
define i32 @uadd_with_zext_inverse(i32 %x, i32 %y) {
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; CHECK-LABEL: @uadd_with_zext_inverse(
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; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV]], [[CONV1]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i64 [[ADD]], 4294967296
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; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[COND]]
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;
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%conv = zext i32 %x to i64
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%conv1 = zext i32 %y to i64
200+
%add = add i64 %conv, %conv1
201+
%cmp = icmp ule i64 %add, 4294967295
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%cond = zext i1 %cmp to i32
203+
ret i32 %cond
204+
}
205+
206+
define i32 @uadd_with_zext_neg_use(i32 %x, i32 %y) {
207+
; CHECK-LABEL: @uadd_with_zext_neg_use(
208+
; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV]], [[CONV1]]
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; CHECK-NEXT: call void @usei64(i64 [[ADD]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i64 [[ADD]], 4294967295
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; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[COND]]
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;
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%conv = zext i32 %x to i64
217+
%conv1 = zext i32 %y to i64
218+
%add = add i64 %conv, %conv1
219+
call void @usei64(i64 %add)
220+
%cmp = icmp ugt i64 %add, 4294967295
221+
%cond = zext i1 %cmp to i32
222+
ret i32 %cond
223+
}
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declare void @usei64(i64)

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