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[InstCombine] Add missing patterns for scmp and ucmp
Fixes: #146178
1 parent 8d8c46c commit 0c86331

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2 files changed

+162
-14
lines changed

2 files changed

+162
-14
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp‎

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3757,6 +3757,10 @@ static Instruction *foldBitCeil(SelectInst &SI, IRBuilderBase &Builder,
37573757
// (x < y) ? -1 : zext(x > y)
37583758
// (x > y) ? 1 : sext(x != y)
37593759
// (x > y) ? 1 : sext(x < y)
3760+
// (x == y) ? 0 : (x > y ? 1 : -1)
3761+
// (x == y) ? 0 : (x < y ? -1 : 1)
3762+
// Special case: x == C ? 0 : (x > C - 1 ? 1 : -1)
3763+
// Special case: x == C ? 0 : (x < C + 1 ? -1 : 1)
37603764
// Into ucmp/scmp(x, y), where signedness is determined by the signedness
37613765
// of the comparison in the original sequence.
37623766
Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
@@ -3849,6 +3853,45 @@ Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
38493853
}
38503854
}
38513855

3856+
// Special cases with constants: x == C ? 0 : (x > C-1 ? 1 : -1)
3857+
if (Pred == ICmpInst::ICMP_EQ && match(TV, m_Zero())) {
3858+
Value *X;
3859+
const APInt *C;
3860+
if (match(LHS, m_Value(X)) && match(RHS, m_APInt(C))) {
3861+
CmpPredicate InnerPred;
3862+
Value *InnerLHS, *InnerRHS;
3863+
const APInt *InnerTV, *InnerFV;
3864+
if (match(FV, m_Select(
3865+
m_ICmp(InnerPred, m_Value(InnerLHS), m_Value(InnerRHS)),
3866+
m_APInt(InnerTV), m_APInt(InnerFV)))) {
3867+
3868+
// x == C ? 0 : (x > C-1 ? 1 : -1)
3869+
if (ICmpInst::isGT(InnerPred) && InnerTV->isOne() &&
3870+
InnerFV->isAllOnes()) {
3871+
IsSigned = ICmpInst::isSigned(InnerPred);
3872+
bool CanSubOne = IsSigned ? !C->isMinSignedValue() : !C->isMinValue();
3873+
if (CanSubOne) {
3874+
APInt Cminus1 = *C - 1;
3875+
if (InnerLHS == X && match(InnerRHS, m_SpecificInt(Cminus1)))
3876+
Replace = true;
3877+
}
3878+
}
3879+
3880+
// x == C ? 0 : (x < C+1 ? -1 : 1)
3881+
if (ICmpInst::isLT(InnerPred) && InnerTV->isAllOnes() &&
3882+
InnerFV->isOne()) {
3883+
IsSigned = ICmpInst::isSigned(InnerPred);
3884+
bool CanAddOne = IsSigned ? !C->isMaxSignedValue() : !C->isMaxValue();
3885+
if (CanAddOne) {
3886+
APInt Cplus1 = *C + 1;
3887+
if (InnerLHS == X && match(InnerRHS, m_SpecificInt(Cplus1)))
3888+
Replace = true;
3889+
}
3890+
}
3891+
}
3892+
}
3893+
}
3894+
38523895
Intrinsic::ID IID = IsSigned ? Intrinsic::scmp : Intrinsic::ucmp;
38533896
if (Replace)
38543897
return replaceInstUsesWith(
@@ -4638,5 +4681,20 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
46384681
Align(MaskedLoadAlignment->getZExtValue()),
46394682
CondVal, FalseVal));
46404683

4684+
// Canonicalize sign function ashr pattern: select (icmp slt X, 1), ashr X,
4685+
// bitwidth-1, 1 -> scmp(X, 0)
4686+
Value *X;
4687+
unsigned BitWidth = SI.getType()->getScalarSizeInBits();
4688+
CmpPredicate Pred;
4689+
if (match(&SI, m_Select(m_ICmp(Pred, m_Value(X), m_One()),
4690+
m_AShr(m_Deferred(X), m_SpecificInt(BitWidth - 1)),
4691+
m_One())) &&
4692+
Pred == ICmpInst::ICMP_SLT) {
4693+
4694+
Function *Scmp = Intrinsic::getOrInsertDeclaration(
4695+
SI.getModule(), Intrinsic::scmp, {SI.getType(), SI.getType()});
4696+
return CallInst::Create(Scmp, {X, ConstantInt::get(SI.getType(), 0)});
4697+
}
4698+
46414699
return nullptr;
46424700
}

‎llvm/test/Transforms/InstCombine/scmp.ll‎

Lines changed: 104 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -439,9 +439,7 @@ define <3 x i2> @scmp_unary_shuffle_ops(<3 x i8> %x, <3 x i8> %y) {
439439
define i32 @scmp_ashr(i32 %a) {
440440
; CHECK-LABEL: define i32 @scmp_ashr(
441441
; CHECK-SAME: i32 [[A:%.*]]) {
442-
; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr i32 [[A]], 31
443-
; CHECK-NEXT: [[CMP_INV:%.*]] = icmp slt i32 [[A]], 1
444-
; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP_INV]], i32 [[A_LOBIT]], i32 1
442+
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
445443
; CHECK-NEXT: ret i32 [[RETVAL_0]]
446444
;
447445
%a.lobit = ashr i32 %a, 31
@@ -453,9 +451,7 @@ define i32 @scmp_ashr(i32 %a) {
453451
define i32 @scmp_sgt_slt(i32 %a) {
454452
; CHECK-LABEL: define i32 @scmp_sgt_slt(
455453
; CHECK-SAME: i32 [[A:%.*]]) {
456-
; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr i32 [[A]], 31
457-
; CHECK-NEXT: [[CMP_INV:%.*]] = icmp slt i32 [[A]], 1
458-
; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP_INV]], i32 [[A_LOBIT]], i32 1
454+
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
459455
; CHECK-NEXT: ret i32 [[RETVAL_0]]
460456
;
461457
%cmp = icmp sgt i32 %a, 0
@@ -468,10 +464,7 @@ define i32 @scmp_sgt_slt(i32 %a) {
468464
define i32 @scmp_zero_slt(i32 %a) {
469465
; CHECK-LABEL: define i32 @scmp_zero_slt(
470466
; CHECK-SAME: i32 [[A:%.*]]) {
471-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
472-
; CHECK-NEXT: [[CMP1_INV:%.*]] = icmp slt i32 [[A]], 1
473-
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP1_INV]], i32 -1, i32 1
474-
; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP]], i32 0, i32 [[DOT]]
467+
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
475468
; CHECK-NEXT: ret i32 [[RETVAL_0]]
476469
;
477470
%cmp = icmp eq i32 %a, 0
@@ -484,10 +477,7 @@ define i32 @scmp_zero_slt(i32 %a) {
484477
define i32 @scmp_zero_sgt(i32 %a) {
485478
; CHECK-LABEL: define i32 @scmp_zero_sgt(
486479
; CHECK-SAME: i32 [[A:%.*]]) {
487-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
488-
; CHECK-NEXT: [[CMP1_INV:%.*]] = icmp sgt i32 [[A]], -1
489-
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP1_INV]], i32 1, i32 -1
490-
; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP]], i32 0, i32 [[DOT]]
480+
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
491481
; CHECK-NEXT: ret i32 [[RETVAL_0]]
492482
;
493483
%cmp = icmp eq i32 %a, 0
@@ -498,6 +488,106 @@ define i32 @scmp_zero_sgt(i32 %a) {
498488
}
499489

500490

491+
define i32 @scmp_zero_sgt_1(i32 %a) {
492+
; CHECK-LABEL: define i32 @scmp_zero_sgt_1(
493+
; CHECK-SAME: i32 [[A:%.*]]) {
494+
; CHECK-NEXT: [[COND2:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
495+
; CHECK-NEXT: ret i32 [[COND2]]
496+
;
497+
%cmp = icmp eq i32 %a, 0
498+
%cmp1 = icmp sgt i32 %a, -1
499+
%cond = select i1 %cmp1, i32 1, i32 -1
500+
%cond2 = select i1 %cmp, i32 0, i32 %cond
501+
ret i32 %cond2
502+
}
503+
504+
define i32 @scmp_zero_slt_1(i32 %a) {
505+
; CHECK-LABEL: define i32 @scmp_zero_slt_1(
506+
; CHECK-SAME: i32 [[A:%.*]]) {
507+
; CHECK-NEXT: [[COND2:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
508+
; CHECK-NEXT: ret i32 [[COND2]]
509+
;
510+
%cmp = icmp eq i32 %a, 0
511+
%cmp1 = icmp slt i32 %a, 1
512+
%cond = select i1 %cmp1, i32 -1, i32 1
513+
%cond2 = select i1 %cmp, i32 0, i32 %cond
514+
ret i32 %cond2
515+
}
516+
517+
define i32 @scmp_zero_slt_neg(i32 %a) {
518+
; CHECK-LABEL: define i32 @scmp_zero_slt_neg(
519+
; CHECK-SAME: i32 [[A:%.*]]) {
520+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
521+
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], -1
522+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 -1, i32 1
523+
; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]]
524+
; CHECK-NEXT: ret i32 [[COND2]]
525+
;
526+
%cmp = icmp eq i32 %a, 0
527+
%cmp1 = icmp slt i32 %a, -1
528+
%cond = select i1 %cmp1, i32 -1, i32 1
529+
%cond2 = select i1 %cmp, i32 0, i32 %cond
530+
ret i32 %cond2
531+
}
532+
533+
define i32 @scmp_zero_sgt_neg(i32 %a) {
534+
; CHECK-LABEL: define i32 @scmp_zero_sgt_neg(
535+
; CHECK-SAME: i32 [[A:%.*]]) {
536+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
537+
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], 1
538+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 1, i32 -1
539+
; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]]
540+
; CHECK-NEXT: ret i32 [[COND2]]
541+
;
542+
%cmp = icmp eq i32 %a, 0
543+
%cmp1 = icmp sgt i32 %a, 1
544+
%cond = select i1 %cmp1, i32 1, i32 -1
545+
%cond2 = select i1 %cmp, i32 0, i32 %cond
546+
ret i32 %cond2
547+
}
548+
549+
define i32 @ucmp_ugt_ult_neg(i32 %a) {
550+
; CHECK-LABEL: define i32 @ucmp_ugt_ult_neg(
551+
; CHECK-SAME: i32 [[A:%.*]]) {
552+
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ne i32 [[A]], 0
553+
; CHECK-NEXT: [[RETVAL_0:%.*]] = zext i1 [[CMP_NOT]] to i32
554+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
555+
;
556+
%cmp = icmp ugt i32 %a, 0
557+
%cmp1 = icmp ult i32 %a, 0
558+
%. = select i1 %cmp1, i32 -1, i32 0
559+
%retval.0 = select i1 %cmp, i32 1, i32 %.
560+
ret i32 %retval.0
561+
}
562+
563+
define i32 @ucmp_zero_ult_neg(i32 %a) {
564+
; CHECK-LABEL: define i32 @ucmp_zero_ult_neg(
565+
; CHECK-SAME: i32 [[A:%.*]]) {
566+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A]], 0
567+
; CHECK-NEXT: [[RETVAL_0:%.*]] = zext i1 [[CMP]] to i32
568+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
569+
;
570+
%cmp = icmp eq i32 %a, 0
571+
%cmp1.inv = icmp ult i32 %a, 1
572+
%. = select i1 %cmp1.inv, i32 -1, i32 1
573+
%retval.0 = select i1 %cmp, i32 0, i32 %.
574+
ret i32 %retval.0
575+
}
576+
577+
define i32 @ucmp_zero_ugt_neg(i32 %a) {
578+
; CHECK-LABEL: define i32 @ucmp_zero_ugt_neg(
579+
; CHECK-SAME: i32 [[A:%.*]]) {
580+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A]], 0
581+
; CHECK-NEXT: [[RETVAL_0:%.*]] = sext i1 [[CMP]] to i32
582+
; CHECK-NEXT: ret i32 [[RETVAL_0]]
583+
;
584+
%cmp = icmp eq i32 %a, 0
585+
%cmp1.inv = icmp ugt i32 %a, -1
586+
%. = select i1 %cmp1.inv, i32 1, i32 -1
587+
%retval.0 = select i1 %cmp, i32 0, i32 %.
588+
ret i32 %retval.0
589+
}
590+
501591
define i32 @scmp_sgt_slt_ab(i32 %a, i32 %b) {
502592
; CHECK-LABEL: define i32 @scmp_sgt_slt_ab(
503593
; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {

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