Update the scriptable tests

Author: Nicholas-Baron

llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll

@@ -14,7 +14,7 @@ define amdgpu_kernel void @test_mfma_f32_32x32x2bf16(ptr addrspace(1) %arg) #0 {
 ; GFX908-LABEL: test_mfma_f32_32x32x2bf16:
 ; GFX908:       ; %bb.0: ; %bb
 ; GFX908-NEXT:    s_load_dwordx2 s[34:35], s[4:5], 0x24
-; GFX908-NEXT:    v_mov_b32_e32 v4, 0
+; GFX908-NEXT:    v_mov_b32_e32 v29, 0
 ; GFX908-NEXT:    s_waitcnt lgkmcnt(0)
 ; GFX908-NEXT:    s_load_dwordx16 s[16:31], s[34:35], 0x0
 ; GFX908-NEXT:    s_load_dwordx16 s[0:15], s[34:35], 0x40
@@ -24,13 +24,11 @@ define amdgpu_kernel void @test_mfma_f32_32x32x2bf16(ptr addrspace(1) %arg) #0 {
 ; GFX908-NEXT:    v_mov_b32_e32 v2, s18
 ; GFX908-NEXT:    v_accvgpr_write_b32 a0, v0
 ; GFX908-NEXT:    v_accvgpr_write_b32 a1, v1
+; GFX908-NEXT:    v_mov_b32_e32 v0, s22
+; GFX908-NEXT:    v_mov_b32_e32 v1, s23
 ; GFX908-NEXT:    v_accvgpr_write_b32 a2, v2
-; GFX908-NEXT:    v_mov_b32_e32 v0, s21
-; GFX908-NEXT:    v_mov_b32_e32 v1, s22
-; GFX908-NEXT:    v_mov_b32_e32 v2, s23
-; GFX908-NEXT:    v_accvgpr_write_b32 a5, v0
-; GFX908-NEXT:    v_accvgpr_write_b32 a6, v1
-; GFX908-NEXT:    v_accvgpr_write_b32 a7, v2
+; GFX908-NEXT:    v_accvgpr_write_b32 a6, v0
+; GFX908-NEXT:    v_accvgpr_write_b32 a7, v1
 ; GFX908-NEXT:    v_mov_b32_e32 v0, s24
 ; GFX908-NEXT:    v_mov_b32_e32 v1, s25
 ; GFX908-NEXT:    v_mov_b32_e32 v2, s26
@@ -71,7 +69,8 @@ define amdgpu_kernel void @test_mfma_f32_32x32x2bf16(ptr addrspace(1) %arg) #0 {
 ; GFX908-NEXT:    v_mov_b32_e32 v0, s10
 ; GFX908-NEXT:    v_mov_b32_e32 v1, s11
 ; GFX908-NEXT:    v_mov_b32_e32 v2, s12
-; GFX908-NEXT:    v_mov_b32_e32 v5, s20
+; GFX908-NEXT:    v_mov_b32_e32 v4, s20
+; GFX908-NEXT:    v_mov_b32_e32 v5, s21
 ; GFX908-NEXT:    v_accvgpr_write_b32 a3, v3
 ; GFX908-NEXT:    v_accvgpr_write_b32 a26, v0
 ; GFX908-NEXT:    v_accvgpr_write_b32 a27, v1
@@ -80,7 +79,8 @@ define amdgpu_kernel void @test_mfma_f32_32x32x2bf16(ptr addrspace(1) %arg) #0 {
 ; GFX908-NEXT:    v_mov_b32_e32 v1, s14
 ; GFX908-NEXT:    v_mov_b32_e32 v2, s15
 ; GFX908-NEXT:    v_mov_b32_e32 v3, 1
-; GFX908-NEXT:    v_accvgpr_write_b32 a4, v5
+; GFX908-NEXT:    v_accvgpr_write_b32 a4, v4
+; GFX908-NEXT:    v_accvgpr_write_b32 a5, v5
 ; GFX908-NEXT:    v_accvgpr_write_b32 a29, v0
 ; GFX908-NEXT:    v_accvgpr_write_b32 a30, v1
 ; GFX908-NEXT:    v_accvgpr_write_b32 a31, v2
@@ -94,57 +94,42 @@ define amdgpu_kernel void @test_mfma_f32_32x32x2bf16(ptr addrspace(1) %arg) #0 {
 ; GFX908-NEXT:    v_accvgpr_read_b32 v2, a26
 ; GFX908-NEXT:    v_accvgpr_read_b32 v1, a25
 ; GFX908-NEXT:    v_accvgpr_read_b32 v0, a24
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35] offset:96
-; GFX908-NEXT:    s_nop 0
-; GFX908-NEXT:    v_accvgpr_read_b32 v3, a31
-; GFX908-NEXT:    v_accvgpr_read_b32 v2, a30
-; GFX908-NEXT:    v_accvgpr_read_b32 v1, a29
-; GFX908-NEXT:    v_accvgpr_read_b32 v0, a28
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35] offset:112
-; GFX908-NEXT:    s_nop 0
-; GFX908-NEXT:    v_accvgpr_read_b32 v3, a19
-; GFX908-NEXT:    v_accvgpr_read_b32 v2, a18
-; GFX908-NEXT:    v_accvgpr_read_b32 v1, a17
-; GFX908-NEXT:    v_accvgpr_read_b32 v0, a16
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35] offset:64
-; GFX908-NEXT:    s_nop 0
-; GFX908-NEXT:    v_accvgpr_read_b32 v3, a23
-; GFX908-NEXT:    v_accvgpr_read_b32 v2, a22
-; GFX908-NEXT:    v_accvgpr_read_b32 v1, a21
-; GFX908-NEXT:    v_accvgpr_read_b32 v0, a20
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35] offset:80
-; GFX908-NEXT:    s_nop 0
-; GFX908-NEXT:    v_accvgpr_read_b32 v3, a11
-; GFX908-NEXT:    v_accvgpr_read_b32 v2, a10
-; GFX908-NEXT:    v_accvgpr_read_b32 v1, a9
-; GFX908-NEXT:    v_accvgpr_read_b32 v0, a8
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35] offset:32
-; GFX908-NEXT:    s_nop 0
-; GFX908-NEXT:    v_accvgpr_read_b32 v3, a15
-; GFX908-NEXT:    v_accvgpr_read_b32 v2, a14
-; GFX908-NEXT:    v_accvgpr_read_b32 v1, a13
-; GFX908-NEXT:    v_accvgpr_read_b32 v0, a12
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35] offset:48
-; GFX908-NEXT:    s_nop 0
-; GFX908-NEXT:    v_accvgpr_read_b32 v3, a3
-; GFX908-NEXT:    v_accvgpr_read_b32 v2, a2
-; GFX908-NEXT:    v_accvgpr_read_b32 v1, a1
-; GFX908-NEXT:    v_accvgpr_read_b32 v0, a0
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35]
-; GFX908-NEXT:    s_nop 0
-; GFX908-NEXT:    v_accvgpr_read_b32 v3, a7
-; GFX908-NEXT:    v_accvgpr_read_b32 v2, a6
-; GFX908-NEXT:    v_accvgpr_read_b32 v1, a5
-; GFX908-NEXT:    v_accvgpr_read_b32 v0, a4
-; GFX908-NEXT:    s_nop 1
-; GFX908-NEXT:    global_store_dwordx4 v4, v[0:3], s[34:35] offset:16
+; GFX908-NEXT:    v_accvgpr_read_b32 v4, a31
+; GFX908-NEXT:    v_accvgpr_read_b32 v8, a19
+; GFX908-NEXT:    global_store_dwordx4 v29, v[0:3], s[34:35] offset:96
+; GFX908-NEXT:    v_accvgpr_read_b32 v12, a23
+; GFX908-NEXT:    v_accvgpr_read_b32 v3, a30
+; GFX908-NEXT:    v_accvgpr_read_b32 v2, a29
+; GFX908-NEXT:    v_accvgpr_read_b32 v1, a28
+; GFX908-NEXT:    v_accvgpr_read_b32 v16, a11
+; GFX908-NEXT:    v_accvgpr_read_b32 v20, a15
+; GFX908-NEXT:    v_accvgpr_read_b32 v24, a3
+; GFX908-NEXT:    v_accvgpr_read_b32 v28, a7
+; GFX908-NEXT:    v_accvgpr_read_b32 v7, a18
+; GFX908-NEXT:    v_accvgpr_read_b32 v6, a17
+; GFX908-NEXT:    v_accvgpr_read_b32 v5, a16
+; GFX908-NEXT:    v_accvgpr_read_b32 v11, a22
+; GFX908-NEXT:    v_accvgpr_read_b32 v10, a21
+; GFX908-NEXT:    v_accvgpr_read_b32 v9, a20
+; GFX908-NEXT:    v_accvgpr_read_b32 v15, a10
+; GFX908-NEXT:    v_accvgpr_read_b32 v14, a9
+; GFX908-NEXT:    v_accvgpr_read_b32 v13, a8
+; GFX908-NEXT:    v_accvgpr_read_b32 v19, a14
+; GFX908-NEXT:    v_accvgpr_read_b32 v18, a13
+; GFX908-NEXT:    v_accvgpr_read_b32 v17, a12
+; GFX908-NEXT:    v_accvgpr_read_b32 v23, a2
+; GFX908-NEXT:    v_accvgpr_read_b32 v22, a1
+; GFX908-NEXT:    v_accvgpr_read_b32 v21, a0
+; GFX908-NEXT:    v_accvgpr_read_b32 v27, a6
+; GFX908-NEXT:    v_accvgpr_read_b32 v26, a5
+; GFX908-NEXT:    v_accvgpr_read_b32 v25, a4
+; GFX908-NEXT:    global_store_dwordx4 v29, v[1:4], s[34:35] offset:112
+; GFX908-NEXT:    global_store_dwordx4 v29, v[5:8], s[34:35] offset:64
+; GFX908-NEXT:    global_store_dwordx4 v29, v[9:12], s[34:35] offset:80
+; GFX908-NEXT:    global_store_dwordx4 v29, v[13:16], s[34:35] offset:32
+; GFX908-NEXT:    global_store_dwordx4 v29, v[17:20], s[34:35] offset:48
+; GFX908-NEXT:    global_store_dwordx4 v29, v[21:24], s[34:35]
+; GFX908-NEXT:    global_store_dwordx4 v29, v[25:28], s[34:35] offset:16
 ; GFX908-NEXT:    s_endpgm
 ;
 ; GFX90A-LABEL: test_mfma_f32_32x32x2bf16: