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Refactor to just reuse LiveRangeEdit
1 parent da6cc49 commit 0ca6a24

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6 files changed

+70
-61
lines changed

6 files changed

+70
-61
lines changed

llvm/include/llvm/CodeGen/CalcSpillWeights.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ class VirtRegMap;
7979

8080
/// Determine if all values in LI are rematerializable.
8181
static bool isRematerializable(const LiveInterval &LI,
82-
const LiveIntervals &LIS,
82+
LiveIntervals &LIS,
8383
const VirtRegMap &VRM,
8484
const TargetInstrInfo &TII);
8585

llvm/include/llvm/CodeGen/LiveIntervals.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -466,10 +466,6 @@ class LiveIntervals {
466466
/// have any segments or value numbers.
467467
LLVM_ABI void constructMainRangeFromSubranges(LiveInterval &LI);
468468

469-
/// \returns true if all registers used by \p OrigMI at \p OrigIdx are also
470-
/// available with the same value at \p UseIdx.
471-
bool allUsesAvailableAt(const MachineInstr &MI, SlotIndex UseIdx) const;
472-
473469
private:
474470
/// Compute live intervals for all virtual registers.
475471
void computeVirtRegs();

llvm/include/llvm/CodeGen/LiveRangeEdit.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -193,6 +193,11 @@ class LiveRangeEdit : private MachineRegisterInfo::Delegate {
193193
explicit Remat(const VNInfo *ParentVNI) : ParentVNI(ParentVNI) {}
194194
};
195195

196+
/// allUsesAvailableAt - Return true if all registers used by OrigMI at
197+
/// OrigIdx are also available with the same value at UseIdx.
198+
bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
199+
SlotIndex UseIdx) const;
200+
196201
/// canRematerializeAt - Determine if ParentVNI can be rematerialized at
197202
/// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
198203
bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx);

llvm/lib/CodeGen/CalcSpillWeights.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#include "llvm/ADT/SmallPtrSet.h"
1111
#include "llvm/CodeGen/LiveInterval.h"
1212
#include "llvm/CodeGen/LiveIntervals.h"
13+
#include "llvm/CodeGen/LiveRangeEdit.h"
1314
#include "llvm/CodeGen/MachineFunction.h"
1415
#include "llvm/CodeGen/MachineInstr.h"
1516
#include "llvm/CodeGen/MachineLoopInfo.h"
@@ -79,7 +80,7 @@ Register VirtRegAuxInfo::copyHint(const MachineInstr *MI, Register Reg,
7980

8081
// Check if all values in LI are rematerializable
8182
bool VirtRegAuxInfo::isRematerializable(const LiveInterval &LI,
82-
const LiveIntervals &LIS,
83+
LiveIntervals &LIS,
8384
const VirtRegMap &VRM,
8485
const TargetInstrInfo &TII) {
8586
Register Reg = LI.reg();
@@ -127,12 +128,14 @@ bool VirtRegAuxInfo::isRematerializable(const LiveInterval &LI,
127128

128129
// If MI has register uses, it will only be rematerializable if its uses are
129130
// also live at the indices it will be rematerialized at.
131+
SmallVector<Register, 8> NewRegs;
132+
LiveRangeEdit LRE(nullptr, NewRegs, *MI->getMF(), LIS, nullptr);
130133
const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo();
131134
for (MachineInstr &Use : MRI.use_nodbg_instructions(Reg)) {
132135
SlotIndex UseIdx = LIS.getInstructionIndex(Use);
133136
if (LI.getVNInfoAt(UseIdx) != VNI)
134137
continue;
135-
if (!LIS.allUsesAvailableAt(*MI, UseIdx))
138+
if (!LRE.allUsesAvailableAt(MI, VNI->def, UseIdx))
136139
return false;
137140
}
138141
}

llvm/lib/CodeGen/LiveIntervals.cpp

Lines changed: 0 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,6 @@
3434
#include "llvm/CodeGen/Passes.h"
3535
#include "llvm/CodeGen/SlotIndexes.h"
3636
#include "llvm/CodeGen/StackMaps.h"
37-
#include "llvm/CodeGen/TargetInstrInfo.h"
3837
#include "llvm/CodeGen/TargetRegisterInfo.h"
3938
#include "llvm/CodeGen/TargetSubtargetInfo.h"
4039
#include "llvm/CodeGen/VirtRegMap.h"
@@ -1821,54 +1820,3 @@ void LiveIntervals::constructMainRangeFromSubranges(LiveInterval &LI) {
18211820
LICalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
18221821
LICalc->constructMainRangeFromSubranges(LI);
18231822
}
1824-
1825-
bool LiveIntervals::allUsesAvailableAt(const MachineInstr &MI,
1826-
SlotIndex UseIdx) const {
1827-
SlotIndex OrigIdx = getInstructionIndex(MI).getRegSlot(true);
1828-
UseIdx = std::max(UseIdx, UseIdx.getRegSlot(true));
1829-
for (const MachineOperand &MO : MI.operands()) {
1830-
if (!MO.isReg() || !MO.getReg() || !MO.readsReg())
1831-
continue;
1832-
1833-
// We can't remat physreg uses, unless it is a constant or target wants
1834-
// to ignore this use.
1835-
if (MO.getReg().isPhysical()) {
1836-
if (MRI->isConstantPhysReg(MO.getReg()) || TII->isIgnorableUse(MO))
1837-
continue;
1838-
return false;
1839-
}
1840-
1841-
const LiveInterval &li = getInterval(MO.getReg());
1842-
const VNInfo *OVNI = li.getVNInfoAt(OrigIdx);
1843-
if (!OVNI)
1844-
continue;
1845-
1846-
// Don't allow rematerialization immediately after the original def.
1847-
// It would be incorrect if OrigMI redefines the register.
1848-
// See PR14098.
1849-
if (SlotIndex::isSameInstr(OrigIdx, UseIdx))
1850-
return false;
1851-
1852-
if (OVNI != li.getVNInfoAt(UseIdx))
1853-
return false;
1854-
1855-
// Check that subrange is live at UseIdx.
1856-
if (li.hasSubRanges()) {
1857-
const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
1858-
unsigned SubReg = MO.getSubReg();
1859-
LaneBitmask LM = SubReg ? TRI->getSubRegIndexLaneMask(SubReg)
1860-
: MRI->getMaxLaneMaskForVReg(MO.getReg());
1861-
for (const LiveInterval::SubRange &SR : li.subranges()) {
1862-
if ((SR.LaneMask & LM).none())
1863-
continue;
1864-
if (!SR.liveAt(UseIdx))
1865-
return false;
1866-
// Early exit if all used lanes are checked. No need to continue.
1867-
LM &= ~SR.LaneMask;
1868-
if (LM.none())
1869-
break;
1870-
}
1871-
}
1872-
}
1873-
return true;
1874-
}

llvm/lib/CodeGen/LiveRangeEdit.cpp

Lines changed: 59 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,60 @@ bool LiveRangeEdit::anyRematerializable() {
101101
return !Remattable.empty();
102102
}
103103

104+
/// allUsesAvailableAt - Return true if all registers used by OrigMI at
105+
/// OrigIdx are also available with the same value at UseIdx.
106+
bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
107+
SlotIndex OrigIdx,
108+
SlotIndex UseIdx) const {
109+
OrigIdx = OrigIdx.getRegSlot(true);
110+
UseIdx = std::max(UseIdx, UseIdx.getRegSlot(true));
111+
for (const MachineOperand &MO : OrigMI->operands()) {
112+
if (!MO.isReg() || !MO.getReg() || !MO.readsReg())
113+
continue;
114+
115+
// We can't remat physreg uses, unless it is a constant or target wants
116+
// to ignore this use.
117+
if (MO.getReg().isPhysical()) {
118+
if (MRI.isConstantPhysReg(MO.getReg()) || TII.isIgnorableUse(MO))
119+
continue;
120+
return false;
121+
}
122+
123+
LiveInterval &li = LIS.getInterval(MO.getReg());
124+
const VNInfo *OVNI = li.getVNInfoAt(OrigIdx);
125+
if (!OVNI)
126+
continue;
127+
128+
// Don't allow rematerialization immediately after the original def.
129+
// It would be incorrect if OrigMI redefines the register.
130+
// See PR14098.
131+
if (SlotIndex::isSameInstr(OrigIdx, UseIdx))
132+
return false;
133+
134+
if (OVNI != li.getVNInfoAt(UseIdx))
135+
return false;
136+
137+
// Check that subrange is live at UseIdx.
138+
if (li.hasSubRanges()) {
139+
const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
140+
unsigned SubReg = MO.getSubReg();
141+
LaneBitmask LM = SubReg ? TRI->getSubRegIndexLaneMask(SubReg)
142+
: MRI.getMaxLaneMaskForVReg(MO.getReg());
143+
for (LiveInterval::SubRange &SR : li.subranges()) {
144+
if ((SR.LaneMask & LM).none())
145+
continue;
146+
if (!SR.liveAt(UseIdx))
147+
return false;
148+
// Early exit if all used lanes are checked. No need to continue.
149+
LM &= ~SR.LaneMask;
150+
if (LM.none())
151+
break;
152+
}
153+
}
154+
}
155+
return true;
156+
}
157+
104158
bool LiveRangeEdit::canRematerializeAt(Remat &RM, VNInfo *OrigVNI,
105159
SlotIndex UseIdx) {
106160
assert(ScannedRemattable && "Call anyRematerializable first");
@@ -110,10 +164,12 @@ bool LiveRangeEdit::canRematerializeAt(Remat &RM, VNInfo *OrigVNI,
110164
return false;
111165

112166
// No defining instruction provided.
167+
SlotIndex DefIdx;
113168
assert(RM.OrigMI && "No defining instruction for remattable value");
169+
DefIdx = LIS.getInstructionIndex(*RM.OrigMI);
114170

115171
// Verify that all used registers are available with the same values.
116-
if (!LIS.allUsesAvailableAt(*RM.OrigMI, UseIdx))
172+
if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx))
117173
return false;
118174

119175
return true;
@@ -174,7 +230,8 @@ bool LiveRangeEdit::foldAsLoad(LiveInterval *LI,
174230

175231
// Since we're moving the DefMI load, make sure we're not extending any live
176232
// ranges.
177-
if (!LIS.allUsesAvailableAt(*DefMI, LIS.getInstructionIndex(*UseMI)))
233+
if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI),
234+
LIS.getInstructionIndex(*UseMI)))
178235
return false;
179236

180237
// We also need to make sure it is safe to move the load.

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