fixup! add test

Author: michaelmaitland

llvm/test/CodeGen/AArch64/csr-copy-hint.mir

@@ -0,0 +1,22 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=arm64-eabi -mattr=v8.3a \ -stop-after=virtregmap -o - %s | FileCheck %s
+
+---
+name:            ra0
+tracksRegLiveness: true
+isSSA:           true
+body:             |
+  bb.0.entry:
+    liveins: $lr
+
+    ; CHECK-LABEL: name: ra0
+    ; CHECK: liveins: $lr
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: $x0 = ORRXrs $xzr, $lr, 0
+    ; CHECK-NEXT: renamable $x0 = XPACI killed renamable $x0
+    ; CHECK-NEXT: RET undef $lr, implicit killed $x0
+    %0:gpr64 = COPY killed $lr
+    %1:gpr64 = XPACI killed %0
+    $x0 = COPY killed %1
+    RET_ReallyLR implicit killed $x0
+...