Change simm10 to simm10_unsigned to handle extended range for PLUI

Author: realqhc

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

@@ -809,7 +809,6 @@ struct RISCVOperand final : public MCParsedAsmOperand {
 
   bool isSImm5() const { return isSImm<5>(); }
   bool isSImm6() const { return isSImm<6>(); }
-  bool isSImm10() const { return isSImm<10>(); }
   bool isSImm11() const { return isSImm<11>(); }
   bool isSImm16() const { return isSImm<16>(); }
   bool isSImm26() const { return isSImm<26>(); }
@@ -909,6 +908,8 @@ struct RISCVOperand final : public MCParsedAsmOperand {
            VK == RISCVMCExpr::VK_QC_ABS20;
   }
 
+  bool isSImm10Unsigned() const { return isSImm<10>() || isUImm<10>(); }
+
   bool isUImm20LUI() const {
     if (!isImm())
       return false;
@@ -1539,9 +1540,9 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
     return generateImmOutOfRangeError(
         Operands, ErrorInfo, 0, (1 << 9) - 8,
         "immediate must be a multiple of 8 bytes in the range");
-  case Match_InvalidSImm10:
+  case Match_InvalidSImm10Unsigned:
     return generateImmOutOfRangeError(Operands, ErrorInfo, -(1 << 9),
-                                      (1 << 9) - 1);
+                                      (1 << 10) - 1);
   case Match_InvalidUImm10Lsb00NonZero:
     return generateImmOutOfRangeError(
         Operands, ErrorInfo, 4, (1 << 10) - 4,

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h

@@ -336,7 +336,7 @@ enum OperandType : unsigned {
   OPERAND_SIMM5_PLUS1,
   OPERAND_SIMM6,
   OPERAND_SIMM6_NONZERO,
-  OPERAND_SIMM10,
+  OPERAND_SIMM10_UNSIGNED,
   OPERAND_SIMM10_LSB0000_NONZERO,
   OPERAND_SIMM11,
   OPERAND_SIMM12,

llvm/lib/Target/RISCV/RISCVInstrInfoP.td

@@ -18,21 +18,34 @@
 // Operand and SDNode transformation definitions.
 //===----------------------------------------------------------------------===//
 
-def simm10 : RISCVSImmLeafOp<10>;
+// A 10-bit signed immediate allowing range [-512, 1023]
+// but will decode to [-512, 511].
+def simm10_unsigned : RISCVOp {
+  let ParserMatchClass = SImmAsmOperand<10, "Unsigned">;
+  let EncoderMethod = "getImmOpValue";
+  let DecoderMethod = "decodeSImmOperand<10>";
+  let OperandType = "OPERAND_SIMM10_UNSIGNED";
+  let MCOperandPredicate = [{
+    int64_t Imm;
+    if (!MCOp.evaluateAsConstantImm(Imm))
+      return false;
+    return isInt<10>(Imm) || isUInt<10>(Imm);
+  }];
+}
 
 //===----------------------------------------------------------------------===//
 // Instruction class templates
 //===----------------------------------------------------------------------===//
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 class RVPUnaryImm10<bits<7> funct7, string opcodestr>
-    : RVInstIBase<0b010, OPC_OP_IMM_32, (outs GPR:$rd), (ins simm10:$simm10),
-                  opcodestr, "$rd, $simm10"> {
-  bits<10> simm10;
+    : RVInstIBase<0b010, OPC_OP_IMM_32, (outs GPR:$rd), (ins simm10_unsigned:$simm10u),
+                  opcodestr, "$rd, $simm10u"> {
+  bits<10> simm10u;
 
   let Inst{31-25} = funct7;
-  let Inst{24-16} = simm10{8-0};
-  let Inst{15}    = simm10{9};
+  let Inst{24-16} = simm10u{8-0};
+  let Inst{15}    = simm10u{9};
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in

llvm/test/MC/RISCV/rv32p-invalid.s

@@ -3,7 +3,7 @@
 
 # Imm overflow
 pli.h a0, 0x400
-# CHECK-ERROR: immediate must be an integer in the range [-512, 511]
+# CHECK-ERROR: immediate must be an integer in the range [-512, 1023]
 pli.b a0, 0x200
 # CHECK-ERROR: immediate must be an integer in the range [0, 255]
 

llvm/test/MC/RISCV/rv64p-invalid.s

@@ -3,9 +3,9 @@
 
 # Imm overflow
 pli.h a0, 0x400
-# CHECK-ERROR: immediate must be an integer in the range [-512, 511]
+# CHECK-ERROR: immediate must be an integer in the range [-512, 1023]
 pli.w a1, -0x201
-# CHECK-ERROR: immediate must be an integer in the range [-512, 511]
+# CHECK-ERROR: immediate must be an integer in the range [-512, 1023]
 
 pslli.b a6, a7, 100
 # CHECK-ERROR: immediate must be an integer in the range [0, 7]