@@ -17,9 +17,7 @@ typedef __SIZE_TYPE__ size_t;
1717// BOTH-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1818// BOTH-NEXT: store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
1919// BOTH-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
20- // BOTH-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[TMP0]]
21- // BOTH-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[TMP0]], 0
22- // BOTH-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[TMP0]]
20+ // BOTH-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 %0, i1 true)
2321// BOTH-NEXT: ret i32 [[ABS]]
2422signed int testabs (signed int a ) {
2523 return __abs (a );
@@ -30,19 +28,15 @@ signed int testabs(signed int a) {
3028// 64BIT-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3129// 64BIT-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
3230// 64BIT-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
33- // 64BIT-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
34- // 64BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
35- // 64BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
31+ // 64BIT-NEXT: [[ABS:%.*]] = call i64 @llvm.abs.i64(i64 [[TMP0]], i1 true)
3632// 64BIT-NEXT: ret i64 [[ABS]]
3733//
3834// 32BIT-LABEL: @testlabs(
3935// 32BIT-NEXT: entry:
4036// 32BIT-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4137// 32BIT-NEXT: store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
4238// 32BIT-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
43- // 32BIT-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[TMP0]]
44- // 32BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[TMP0]], 0
45- // 32BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[TMP0]]
39+ // 32BIT-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[TMP0]], i1 true)
4640// 32BIT-NEXT: ret i32 [[ABS]]
4741//
4842signed long testlabs (signed long a ) {
@@ -54,19 +48,15 @@ signed long testlabs(signed long a) {
5448// 64BIT-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
5549// 64BIT-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
5650// 64BIT-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
57- // 64BIT-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
58- // 64BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
59- // 64BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
51+ // 64BIT-NEXT: [[ABS:%.*]] = call i64 @llvm.abs.i64(i64 [[TMP0]], i1 true)
6052// 64BIT-NEXT: ret i64 [[ABS]]
6153//
6254// 32BIT-LABEL: @testllabs(
6355// 32BIT-NEXT: entry:
6456// 32BIT-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
6557// 32BIT-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
6658// 32BIT-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
67- // 32BIT-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[TMP0]]
68- // 32BIT-NEXT: [[ABSCOND:%.*]] = icmp slt i64 [[TMP0]], 0
69- // 32BIT-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i64 [[NEG]], i64 [[TMP0]]
59+ // 32BIT-NEXT: [[ABS:%.*]] = call i64 @llvm.abs.i64(i64 [[TMP0]], i1 true)
7060// 32BIT-NEXT: ret i64 [[ABS]]
7161//
7262signed long long testllabs (signed long long a ) {
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