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Use FeatureStdExtB instead
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llvm/lib/Target/RISCV/RISCVProcessors.td

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -637,9 +637,7 @@ def ANDES_N45 : RISCVProcessorModel<"andes-n45",
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FeatureStdExtF,
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FeatureStdExtD,
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FeatureStdExtC,
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FeatureStdExtZba,
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FeatureStdExtZbb,
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FeatureStdExtZbs]>;
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FeatureStdExtB]>;
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def ANDES_NX45 : RISCVProcessorModel<"andes-nx45",
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NoSchedModel,
@@ -652,6 +650,4 @@ def ANDES_NX45 : RISCVProcessorModel<"andes-nx45",
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FeatureStdExtF,
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FeatureStdExtD,
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FeatureStdExtC,
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FeatureStdExtZba,
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FeatureStdExtZbb,
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FeatureStdExtZbs]>;
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FeatureStdExtB]>;

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