Address review comment

preames · preames · commit 0e1e8e5232aa · 2025-07-22T11:29:03.000-07:00
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -20809,8 +20809,8 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
       DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, VTs, Ops,
                               cast<MemIntrinsicSDNode>(Tuple)->getMemoryVT(),
                               cast<MemIntrinsicSDNode>(Tuple)->getMemOperand());
-    SDValue Chain = Result.getValue(1);
-    return DAG.getMergeValues({Result, Chain}, DL);
+    DAG.ReplaceAllUsesOfValueWith(Tuple.getValue(1), Result.getValue(1));
+    return Result.getValue(0);
   }
   }
 

Original file line number	Diff line number	Diff line change
`@@ -20809,8 +20809,8 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,`
`20809`	`20809`	`DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, VTs, Ops,`
`20810`	`20810`	`cast<MemIntrinsicSDNode>(Tuple)->getMemoryVT(),`
`20811`	`20811`	`cast<MemIntrinsicSDNode>(Tuple)->getMemOperand());`
`20812`		`- SDValue Chain = Result.getValue(1);`
`20813`		`- return DAG.getMergeValues({Result, Chain}, DL);`
	`20812`	`+ DAG.ReplaceAllUsesOfValueWith(Tuple.getValue(1), Result.getValue(1));`
	`20813`	`+ return Result.getValue(0);`
`20814`	`20814`	`}`
`20815`	`20815`	`}`
`20816`	`20816`