@@ -103,6 +103,11 @@ template <unsigned Size> static unsigned getBytePosition(unsigned BitPos) {
103103 }
104104}
105105
106+ static void addFixup (SmallVectorImpl<MCFixup> &Fixups, uint32_t Offset,
107+ const MCExpr *Value, uint16_t Kind, bool PCRel = false ) {
108+ Fixups.push_back (MCFixup::create (Offset, Value, Kind, PCRel));
109+ }
110+
106111// We need special handlings for relocatable & pc-relative operands that are
107112// larger than a word.
108113// A M68k instruction is aligned by word (16 bits). That means, 32-bit
@@ -139,8 +144,8 @@ void M68kMCCodeEmitter::encodeRelocImm(const MCInst &MI, unsigned OpIdx,
139144
140145 // Relocatable address
141146 unsigned InsertByte = getBytePosition<Size>(InsertPos);
142- Fixups. push_back ( MCFixup::create ( InsertByte, Expr,
143- getFixupForSize (Size, /* IsPCRel=*/ false ) ));
147+ addFixup (Fixups, InsertByte, Expr,
148+ getFixupForSize (Size, /* IsPCRel=*/ false ));
144149 }
145150}
146151
@@ -174,8 +179,7 @@ void M68kMCCodeEmitter::encodePCRelImm(const MCInst &MI, unsigned OpIdx,
174179 Expr, MCConstantExpr::create (LabelOffset, Ctx), Ctx);
175180 }
176181
177- Fixups.push_back (MCFixup::create (InsertByte, Expr,
178- getFixupForSize (Size, /* IsPCRel=*/ true )));
182+ addFixup (Fixups, InsertByte, Expr, getFixupForSize (Size, true ), true );
179183 }
180184}
181185
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