Update comments and remove the complicated sub test.

Author: fzou1

llvm/lib/Target/X86/X86FrameLowering.cpp

@@ -2915,6 +2915,7 @@ bool X86FrameLowering::assignCalleeSavedSpillSlots(
   // 1. Use push2 when
   //       a) number of CSR > 1 if no need padding
   //       b) number of CSR > 2 if need padding
+  //       c) stack alignment >= 16 bytes
   // 2. When the number of CSR push is odd
   //    a. Start to use push2 from the 1st push if stack is 16B aligned.
   //    b. Start to use push2 from the 2nd push if stack is not 16B aligned.

llvm/lib/Target/X86/X86MachineFunctionInfo.h

@@ -149,7 +149,7 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
   /// other tools to detect the extended record.
   bool HasSwiftAsyncContext = false;
 
-  /// Ajust stack for push2/pop2
+  /// Adjust stack for push2/pop2
   bool PadForPush2Pop2 = false;
 
   /// Candidate registers for push2/pop2

llvm/test/CodeGen/X86/apx/push2-pop2-disabled-with-small-stack-alignment.ll

@@ -113,97 +113,5 @@ entry:
   ret void
 }
 
-declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)
-
-define void @lea_in_epilog(i1 %arg, ptr %arg1, ptr %arg2, i64 %arg3, i64 %arg4, i64 %arg5, i64 %arg6, i64 %arg7, i64 %arg8, i64 %arg9, i64 %arg10) nounwind {
-; CHECK-LABEL: lea_in_epilog:
-; CHECK:       # %bb.0: # %bb
-; CHECK-NEXT:    testb $1, %dil
-; CHECK-NEXT:    je .LBB6_5
-; CHECK-NEXT:  # %bb.1: # %bb13
-; CHECK-NEXT:    pushq %rbp
-; CHECK-NEXT:    pushq %r15
-; CHECK-NEXT:    pushq %r14
-; CHECK-NEXT:    pushq %r13
-; CHECK-NEXT:    pushq %r12
-; CHECK-NEXT:    pushq %rbx
-; CHECK-NEXT:    subq $16, %rsp
-; CHECK-NEXT:    movq %r9, %r14
-; CHECK-NEXT:    movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; CHECK-NEXT:    addq {{[0-9]+}}(%rsp), %r14
-; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %r13
-; CHECK-NEXT:    addq %r14, %r13
-; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %r15
-; CHECK-NEXT:    addq %r14, %r15
-; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rbx
-; CHECK-NEXT:    addq %r14, %rbx
-; CHECK-NEXT:    xorl %ebp, %ebp
-; CHECK-NEXT:    xorl %r12d, %r12d
-; CHECK-NEXT:    movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
-; CHECK-NEXT:    .p2align 4
-; CHECK-NEXT:  .LBB6_2: # %bb15
-; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    incq %r12
-; CHECK-NEXT:    movl $432, %edx # imm = 0x1B0
-; CHECK-NEXT:    xorl %edi, %edi
-; CHECK-NEXT:    movq %r15, %rsi
-; CHECK-NEXT:    callq memcpy@PLT
-; CHECK-NEXT:    movl {{[-0-9]+}}(%r{{[sb]}}p), %edi # 4-byte Reload
-; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rax
-; CHECK-NEXT:    addq %rax, %r13
-; CHECK-NEXT:    addq %rax, %r15
-; CHECK-NEXT:    addq %rax, %rbx
-; CHECK-NEXT:    addq %rax, %r14
-; CHECK-NEXT:    addq $8, %rbp
-; CHECK-NEXT:    testb $1, %dil
-; CHECK-NEXT:    je .LBB6_2
-; CHECK-NEXT:  # %bb.3: # %bb11
-; CHECK-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
-; CHECK-NEXT:    leaq {{[0-9]+}}(%rsp), %rsp
-; CHECK-NEXT:    popq %rbx
-; CHECK-NEXT:    popq %r12
-; CHECK-NEXT:    popq %r13
-; CHECK-NEXT:    popq %r14
-; CHECK-NEXT:    popq %r15
-; CHECK-NEXT:    popq %rbp
-; CHECK-NEXT:    jne .LBB6_5
-; CHECK-NEXT:  # %bb.4: # %bb12
-; CHECK-NEXT:    movq $0, (%rax)
-; CHECK-NEXT:  .LBB6_5: # %bb14
-; CHECK-NEXT:    retq
-bb:
-  br i1 %arg, label %bb13, label %bb14
-
-bb11:
-  br i1 %arg, label %bb14, label %bb12
-
-bb12:
-  store double 0.000000e+00, ptr %arg1, align 8
-  br label %bb14
-
-bb13:
-  %getelementptr = getelementptr i8, ptr null, i64 %arg5
-  br label %bb15
-
-bb14:
-  ret void
-
-bb15:
-  %phi = phi i64 [ 0, %bb13 ], [ %add, %bb15 ]
-  %getelementptr16 = getelementptr double, ptr null, i64 %phi
-  %add = add i64 %phi, 1
-  %mul = mul i64 %arg6, %add
-  %getelementptr17 = getelementptr i8, ptr %getelementptr, i64 %mul
-  call void @llvm.memcpy.p0.p0.i64(ptr %getelementptr16, ptr %getelementptr17, i64 0, i1 false)
-  %getelementptr18 = getelementptr i8, ptr %getelementptr17, i64 %arg7
-  %getelementptr19 = getelementptr i8, ptr %getelementptr17, i64 %arg8
-  call void @llvm.memcpy.p0.p0.i64(ptr null, ptr %getelementptr19, i64 0, i1 false)
-  %getelementptr20 = getelementptr i8, ptr %getelementptr17, i64 %arg9
-  call void @llvm.memcpy.p0.p0.i64(ptr null, ptr %getelementptr20, i64 432, i1 false)
-  %getelementptr21 = getelementptr i8, ptr %getelementptr17, i64 %arg10
-  call void @llvm.memcpy.p0.p0.i64(ptr null, ptr %getelementptr21, i64 0, i1 false)
-  br i1 %arg, label %bb11, label %bb15
-}
-
 !llvm.module.flags = !{!0}
 !0 = !{i32 1, !"override-stack-alignment", i32 8}