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TechnoElfknickish
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[M68k] allow 16-bit registers for MOVE to/from CCR
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llvm/lib/Target/M68k/M68kInstrInfo.cpp

Lines changed: 20 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -757,13 +757,27 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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bool ToSR = DstReg == M68k::SR;
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if (FromCCR) {
760-
assert(M68k::DR8RegClass.contains(DstReg) &&
761-
"Need DR8 register to copy CCR");
762-
Opc = M68k::MOV8dc;
760+
if (M68k::DR8RegClass.contains(DstReg))
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Opc = M68k::MOV8dc;
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else if (M68k::DR16RegClass.contains(DstReg))
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Opc = M68k::MOV16dc;
764+
else if (M68k::DR32RegClass.contains(DstReg))
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Opc = M68k::MOV16dc;
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else {
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LLVM_DEBUG(dbgs() << "Cannot copy CCR to " << RI.getName(DstReg) << '\n');
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llvm_unreachable("Invalid register for MOVE from CCR");
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}
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} else if (ToCCR) {
764-
assert(M68k::DR8RegClass.contains(SrcReg) &&
765-
"Need DR8 register to copy CCR");
766-
Opc = M68k::MOV8cd;
771+
if (M68k::DR8RegClass.contains(SrcReg))
772+
Opc = M68k::MOV8cd;
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else if (M68k::DR16RegClass.contains(SrcReg))
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Opc = M68k::MOV16cd;
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else if (M68k::DR32RegClass.contains(SrcReg))
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Opc = M68k::MOV16cd;
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else {
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LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to CCR\n");
779+
llvm_unreachable("Invalid register for MOVE to CCR");
780+
}
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} else if (FromSR || ToSR)
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llvm_unreachable("Cannot emit SR copy instruction");
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