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3 files changed

+39
-21
lines changed

3 files changed

+39
-21
lines changed

clang/include/clang/Basic/BuiltinsX86.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -716,12 +716,12 @@ let Features = "avx2", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
716716
def gatherq_d : X86Builtin<"_Vector<4, int>(_Vector<4, int>, int const *, _Vector<2, long long int>, _Vector<4, int>, _Constant char)">;
717717
}
718718

719-
let Features = "f16c",
719+
let Features = "f16c",
720720
Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
721721
def vcvtps2ph : X86Builtin<"_Vector<8, short>(_Vector<4, float>, _Constant int)">;
722722
}
723723

724-
let Features = "f16c",
724+
let Features = "f16c",
725725
Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
726726
def vcvtps2ph256 : X86Builtin<"_Vector<8, short>(_Vector<8, float>, _Constant int)">;
727727
}

clang/lib/AST/ByteCode/InterpBuiltin.cpp

Lines changed: 19 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -3558,11 +3558,20 @@ static bool interp__builtin_ia32_vcvtps2ph(InterpState &S, CodePtr OpPC,
35583558
llvm::RoundingMode RM;
35593559
if (!UseMXCSR) {
35603560
switch (ImmVal & 3) {
3561-
case 0: RM = llvm::RoundingMode::NearestTiesToEven; break;
3562-
case 1: RM = llvm::RoundingMode::TowardNegative; break;
3563-
case 2: RM = llvm::RoundingMode::TowardPositive; break;
3564-
case 3: RM = llvm::RoundingMode::TowardZero; break;
3565-
default: llvm_unreachable("Invalid immediate rounding mode");
3561+
case 0:
3562+
RM = llvm::RoundingMode::NearestTiesToEven;
3563+
break;
3564+
case 1:
3565+
RM = llvm::RoundingMode::TowardNegative;
3566+
break;
3567+
case 2:
3568+
RM = llvm::RoundingMode::TowardPositive;
3569+
break;
3570+
case 3:
3571+
RM = llvm::RoundingMode::TowardZero;
3572+
break;
3573+
default:
3574+
llvm_unreachable("Invalid immediate rounding mode");
35663575
}
35673576
} else {
35683577
// For MXCSR, we must check for exactness. We can use any rounding mode
@@ -3582,7 +3591,8 @@ static bool interp__builtin_ia32_vcvtps2ph(InterpState &S, CodePtr OpPC,
35823591
APFloat::opStatus St = DstVal.convert(HalfSem, RM, &LostInfo);
35833592

35843593
if (UseMXCSR && St != APFloat::opOK) {
3585-
S.FFDiag(S.Current->getSource(OpPC), diag::note_constexpr_dynamic_rounding);
3594+
S.FFDiag(S.Current->getSource(OpPC),
3595+
diag::note_constexpr_dynamic_rounding);
35863596
return false;
35873597
}
35883598

@@ -3597,12 +3607,10 @@ static bool interp__builtin_ia32_vcvtps2ph(InterpState &S, CodePtr OpPC,
35973607
// (e.g., vcvtps2ph converting 4 floats to 8 shorts).
35983608
if (DstNumElems > SrcNumElems) {
35993609
for (unsigned I = SrcNumElems; I < DstNumElems; ++I) {
3600-
INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
3601-
Dst.elem<T>(I) = T::from(0);
3602-
});
3610+
INT_TYPE_SWITCH_NO_BOOL(DstElemT, { Dst.elem<T>(I) = T::from(0); });
36033611
}
36043612
}
3605-
3613+
36063614
Dst.initializeAllElements();
36073615
return true;
36083616
}
@@ -4973,7 +4981,7 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
49734981
case X86::BI__builtin_ia32_vinsertf128_si256:
49744982
case X86::BI__builtin_ia32_insert128i256:
49754983
return interp__builtin_x86_insert_subvector(S, OpPC, Call, BuiltinID);
4976-
4984+
49774985
case clang::X86::BI__builtin_ia32_vcvtps2ph:
49784986
case clang::X86::BI__builtin_ia32_vcvtps2ph256:
49794987
return interp__builtin_ia32_vcvtps2ph(S, OpPC, Call);

clang/lib/AST/ExprConstant.cpp

Lines changed: 18 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -13889,19 +13889,29 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1388913889
unsigned DstNumElems = DstVTy->getNumElements();
1389013890
QualType DstElemTy = DstVTy->getElementType();
1389113891

13892-
const llvm::fltSemantics &HalfSem = Info.Ctx.getFloatTypeSemantics(Info.Ctx.HalfTy);
13892+
const llvm::fltSemantics &HalfSem =
13893+
Info.Ctx.getFloatTypeSemantics(Info.Ctx.HalfTy);
1389313894

1389413895
int ImmVal = Imm.getZExtValue();
1389513896
bool UseMXCSR = (ImmVal & 4) != 0;
1389613897

1389713898
llvm::RoundingMode RM;
1389813899
if (!UseMXCSR) {
1389913900
switch (ImmVal & 3) {
13900-
case 0: RM = llvm::RoundingMode::NearestTiesToEven; break;
13901-
case 1: RM = llvm::RoundingMode::TowardNegative; break;
13902-
case 2: RM = llvm::RoundingMode::TowardPositive; break;
13903-
case 3: RM = llvm::RoundingMode::TowardZero; break;
13904-
default: llvm_unreachable("Invalid immediate rounding mode");
13901+
case 0:
13902+
RM = llvm::RoundingMode::NearestTiesToEven;
13903+
break;
13904+
case 1:
13905+
RM = llvm::RoundingMode::TowardNegative;
13906+
break;
13907+
case 2:
13908+
RM = llvm::RoundingMode::TowardPositive;
13909+
break;
13910+
case 3:
13911+
RM = llvm::RoundingMode::TowardZero;
13912+
break;
13913+
default:
13914+
llvm_unreachable("Invalid immediate rounding mode");
1390513915
}
1390613916
} else {
1390713917
RM = llvm::RoundingMode::NearestTiesToEven;
@@ -13912,15 +13922,15 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1391213922

1391313923
for (unsigned I = 0; I < SrcNumElems; ++I) {
1391413924
APFloat SrcVal = SrcVec.getVectorElt(I).getFloat();
13915-
13925+
1391613926
bool LostInfo;
1391713927
APFloat::opStatus St = SrcVal.convert(HalfSem, RM, &LostInfo);
1391813928

1391913929
if (UseMXCSR && St != APFloat::opOK) {
1392013930
Info.FFDiag(E, diag::note_constexpr_dynamic_rounding);
1392113931
return false;
1392213932
}
13923-
13933+
1392413934
APSInt DstInt(SrcVal.bitcastToAPInt(),
1392513935
DstElemTy->isUnsignedIntegerOrEnumerationType());
1392613936
ResultElements.push_back(APValue(DstInt));

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