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Add more tests into gpr.s
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  • llvm/test/tools/llvm-mca/RISCV/Andes45

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‎llvm/test/tools/llvm-mca/RISCV/Andes45/gpr.s‎

Lines changed: 157 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2-
# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-nx45 -timeline -iterations=1 < %s | FileCheck %s
2+
# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-nx45 -mattr=+zbc -timeline -iterations=1 < %s | FileCheck %s
33

44
# Two ALUs without dependency can be dispatched in the same cycle.
55
add a0, a0, a0
@@ -9,31 +9,67 @@ sub a1, a1, a1
99
addw a0, a0, a0
1010
subw a0, a0, a0
1111

12+
// ALU and Shift
13+
slli a0, a0, 4
14+
slliw a0, a0, 4
15+
srl a0, a0, a0
16+
srlw a0, a0, a0
17+
1218
// MDU
1319
mul a0, a0, a0
20+
mulw a0, a0, a0
1421
div a0, a0, a0
22+
divw a0, a0, a0
1523

1624
// Memory
1725
lb a0, 4(a1)
26+
lh a0, 4(a1)
1827
lw a0, 4(a1)
28+
ld a0, 4(a1)
29+
30+
flw fa0, 4(a1)
31+
fld fa0, 4(a1)
32+
1933
sb a0, 4(a1)
34+
sh a0, 4(a1)
2035
sw a0, 4(a1)
36+
sd a0, 4(a1)
37+
38+
// Atomic Memory
39+
amoswap.w a0, a1, (a0)
40+
amoswap.d a0, a1, (a0)
41+
lr.w a0, (a0)
42+
lr.d a0, (a0)
43+
sc.w a0, a1, (a0)
44+
sc.d a0, a1, (a0)
2145

2246
// CSR
2347
csrrw a0, mstatus, zero
2448

2549
// Bitmanip
2650
sh1add a0, a0, a0
51+
sh1add.uw a0, a0, a0
52+
rori a0, a0, 4
53+
roriw a0, a0, 4
54+
rol a0, a0, a0
55+
rolw a0, a0, a0
56+
clz a0, a0
57+
clzw a0, a0
58+
clmul a0, a0, a0
59+
bclri a0, a0, 4
60+
bclr a0, a0, a0
61+
bexti a0, a0, 4
62+
bext a0, a0, a0
2763

2864
# CHECK: Iterations: 1
29-
# CHECK-NEXT: Instructions: 12
30-
# CHECK-NEXT: Total Cycles: 49
31-
# CHECK-NEXT: Total uOps: 12
65+
# CHECK-NEXT: Instructions: 42
66+
# CHECK-NEXT: Total Cycles: 158
67+
# CHECK-NEXT: Total uOps: 42
3268

3369
# CHECK: Dispatch Width: 2
34-
# CHECK-NEXT: uOps Per Cycle: 0.24
35-
# CHECK-NEXT: IPC: 0.24
36-
# CHECK-NEXT: Block RThroughput: 40.0
70+
# CHECK-NEXT: uOps Per Cycle: 0.27
71+
# CHECK-NEXT: IPC: 0.27
72+
# CHECK-NEXT: Block RThroughput: 80.0
3773

3874
# CHECK: Instruction Info:
3975
# CHECK-NEXT: [1]: #uOps
@@ -48,14 +84,44 @@ sh1add a0, a0, a0
4884
# CHECK-NEXT: 1 1 0.50 sub a1, a1, a1
4985
# CHECK-NEXT: 1 1 0.50 addw a0, a0, a0
5086
# CHECK-NEXT: 1 1 0.50 subw a0, a0, a0
87+
# CHECK-NEXT: 1 1 0.50 slli a0, a0, 4
88+
# CHECK-NEXT: 1 1 0.50 slliw a0, a0, 4
89+
# CHECK-NEXT: 1 1 0.50 srl a0, a0, a0
90+
# CHECK-NEXT: 1 1 0.50 srlw a0, a0, a0
5191
# CHECK-NEXT: 1 3 1.00 mul a0, a0, a0
92+
# CHECK-NEXT: 1 3 1.00 mulw a0, a0, a0
5293
# CHECK-NEXT: 1 39 39.00 div a0, a0, a0
94+
# CHECK-NEXT: 1 39 39.00 divw a0, a0, a0
5395
# CHECK-NEXT: 1 5 1.00 * lb a0, 4(a1)
96+
# CHECK-NEXT: 1 5 1.00 * lh a0, 4(a1)
5497
# CHECK-NEXT: 1 3 1.00 * lw a0, 4(a1)
98+
# CHECK-NEXT: 1 3 1.00 * ld a0, 4(a1)
99+
# CHECK-NEXT: 1 3 1.00 * flw fa0, 4(a1)
100+
# CHECK-NEXT: 1 3 1.00 * fld fa0, 4(a1)
55101
# CHECK-NEXT: 1 1 1.00 * sb a0, 4(a1)
102+
# CHECK-NEXT: 1 1 1.00 * sh a0, 4(a1)
56103
# CHECK-NEXT: 1 1 1.00 * sw a0, 4(a1)
104+
# CHECK-NEXT: 1 1 1.00 * sd a0, 4(a1)
105+
# CHECK-NEXT: 1 9 1.00 * * amoswap.w a0, a1, (a0)
106+
# CHECK-NEXT: 1 9 1.00 * * amoswap.d a0, a1, (a0)
107+
# CHECK-NEXT: 1 9 1.00 * lr.w a0, (a0)
108+
# CHECK-NEXT: 1 9 1.00 * lr.d a0, (a0)
109+
# CHECK-NEXT: 1 3 1.00 * sc.w a0, a1, (a0)
110+
# CHECK-NEXT: 1 3 1.00 * sc.d a0, a1, (a0)
57111
# CHECK-NEXT: 1 1 1.00 U csrrw a0, mstatus, zero
58112
# CHECK-NEXT: 1 1 0.50 sh1add a0, a0, a0
113+
# CHECK-NEXT: 1 1 0.50 sh1add.uw a0, a0, a0
114+
# CHECK-NEXT: 1 1 0.50 rori a0, a0, 4
115+
# CHECK-NEXT: 1 1 0.50 roriw a0, a0, 4
116+
# CHECK-NEXT: 1 1 0.50 rol a0, a0, a0
117+
# CHECK-NEXT: 1 1 0.50 rolw a0, a0, a0
118+
# CHECK-NEXT: 1 3 0.50 clz a0, a0
119+
# CHECK-NEXT: 1 3 0.50 clzw a0, a0
120+
# CHECK-NEXT: 1 3 0.50 clmul a0, a0, a0
121+
# CHECK-NEXT: 1 1 0.50 bclri a0, a0, 4
122+
# CHECK-NEXT: 1 1 0.50 bclr a0, a0, a0
123+
# CHECK-NEXT: 1 1 0.50 bexti a0, a0, 4
124+
# CHECK-NEXT: 1 1 0.50 bext a0, a0, a0
59125

60126
# CHECK: Resources:
61127
# CHECK-NEXT: [0.0] - Andes45ALU
@@ -70,39 +136,69 @@ sh1add a0, a0, a0
70136

71137
# CHECK: Resource pressure per iteration:
72138
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7]
73-
# CHECK-NEXT: 2.00 3.00 1.00 - - - - 4.00 40.00
139+
# CHECK-NEXT: 10.00 11.00 1.00 - - - - 16.00 80.00
74140

75141
# CHECK: Resource pressure by instruction:
76142
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] Instructions:
77143
# CHECK-NEXT: - 1.00 - - - - - - - add a0, a0, a0
78144
# CHECK-NEXT: 1.00 - - - - - - - - sub a1, a1, a1
79145
# CHECK-NEXT: - 1.00 - - - - - - - addw a0, a0, a0
80146
# CHECK-NEXT: 1.00 - - - - - - - - subw a0, a0, a0
147+
# CHECK-NEXT: - 1.00 - - - - - - - slli a0, a0, 4
148+
# CHECK-NEXT: 1.00 - - - - - - - - slliw a0, a0, 4
149+
# CHECK-NEXT: - 1.00 - - - - - - - srl a0, a0, a0
150+
# CHECK-NEXT: 1.00 - - - - - - - - srlw a0, a0, a0
81151
# CHECK-NEXT: - - - - - - - - 1.00 mul a0, a0, a0
152+
# CHECK-NEXT: - - - - - - - - 1.00 mulw a0, a0, a0
82153
# CHECK-NEXT: - - - - - - - - 39.00 div a0, a0, a0
154+
# CHECK-NEXT: - - - - - - - - 39.00 divw a0, a0, a0
83155
# CHECK-NEXT: - - - - - - - 1.00 - lb a0, 4(a1)
156+
# CHECK-NEXT: - - - - - - - 1.00 - lh a0, 4(a1)
84157
# CHECK-NEXT: - - - - - - - 1.00 - lw a0, 4(a1)
158+
# CHECK-NEXT: - - - - - - - 1.00 - ld a0, 4(a1)
159+
# CHECK-NEXT: - - - - - - - 1.00 - flw fa0, 4(a1)
160+
# CHECK-NEXT: - - - - - - - 1.00 - fld fa0, 4(a1)
85161
# CHECK-NEXT: - - - - - - - 1.00 - sb a0, 4(a1)
162+
# CHECK-NEXT: - - - - - - - 1.00 - sh a0, 4(a1)
86163
# CHECK-NEXT: - - - - - - - 1.00 - sw a0, 4(a1)
164+
# CHECK-NEXT: - - - - - - - 1.00 - sd a0, 4(a1)
165+
# CHECK-NEXT: - - - - - - - 1.00 - amoswap.w a0, a1, (a0)
166+
# CHECK-NEXT: - - - - - - - 1.00 - amoswap.d a0, a1, (a0)
167+
# CHECK-NEXT: - - - - - - - 1.00 - lr.w a0, (a0)
168+
# CHECK-NEXT: - - - - - - - 1.00 - lr.d a0, (a0)
169+
# CHECK-NEXT: - - - - - - - 1.00 - sc.w a0, a1, (a0)
170+
# CHECK-NEXT: - - - - - - - 1.00 - sc.d a0, a1, (a0)
87171
# CHECK-NEXT: - - 1.00 - - - - - - csrrw a0, mstatus, zero
88172
# CHECK-NEXT: - 1.00 - - - - - - - sh1add a0, a0, a0
173+
# CHECK-NEXT: 1.00 - - - - - - - - sh1add.uw a0, a0, a0
174+
# CHECK-NEXT: - 1.00 - - - - - - - rori a0, a0, 4
175+
# CHECK-NEXT: 1.00 - - - - - - - - roriw a0, a0, 4
176+
# CHECK-NEXT: - 1.00 - - - - - - - rol a0, a0, a0
177+
# CHECK-NEXT: 1.00 - - - - - - - - rolw a0, a0, a0
178+
# CHECK-NEXT: - 1.00 - - - - - - - clz a0, a0
179+
# CHECK-NEXT: 1.00 - - - - - - - - clzw a0, a0
180+
# CHECK-NEXT: - 1.00 - - - - - - - clmul a0, a0, a0
181+
# CHECK-NEXT: 1.00 - - - - - - - - bclri a0, a0, 4
182+
# CHECK-NEXT: - 1.00 - - - - - - - bclr a0, a0, a0
183+
# CHECK-NEXT: 1.00 - - - - - - - - bexti a0, a0, 4
184+
# CHECK-NEXT: - 1.00 - - - - - - - bext a0, a0, a0
89185

90186
# CHECK: Timeline view:
91-
# CHECK-NEXT: 0123456789 0123456789
92-
# CHECK-NEXT: Index 0123456789 0123456789 012345678
93-
94-
# CHECK: [0,0] DE . . . . . . . . . . add a0, a0, a0
95-
# CHECK-NEXT: [0,1] DE . . . . . . . . . . sub a1, a1, a1
96-
# CHECK-NEXT: [0,2] .DE . . . . . . . . . . addw a0, a0, a0
97-
# CHECK-NEXT: [0,3] . DE . . . . . . . . . . subw a0, a0, a0
98-
# CHECK-NEXT: [0,4] . DeeE . . . . . . . . . mul a0, a0, a0
99-
# CHECK-NEXT: [0,5] . .DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeE . div a0, a0, a0
100-
# CHECK-NEXT: [0,6] . . . . . . . . DeeeeE . lb a0, 4(a1)
101-
# CHECK-NEXT: [0,7] . . . . . . . . . DeeE . lw a0, 4(a1)
102-
# CHECK-NEXT: [0,8] . . . . . . . . . DE . sb a0, 4(a1)
103-
# CHECK-NEXT: [0,9] . . . . . . . . . .DE. sw a0, 4(a1)
104-
# CHECK-NEXT: [0,10] . . . . . . . . . .DE. csrrw a0, mstatus, zero
105-
# CHECK-NEXT: [0,11] . . . . . . . . . . DE sh1add a0, a0, a0
187+
# CHECK-NEXT: 0123456789 0123456789 012
188+
# CHECK-NEXT: Index 0123456789 0123456789 0123456789
189+
190+
# CHECK: [0,0] DE . . . . . . . . . . . add a0, a0, a0
191+
# CHECK-NEXT: [0,1] DE . . . . . . . . . . . sub a1, a1, a1
192+
# CHECK-NEXT: [0,2] .DE . . . . . . . . . . . addw a0, a0, a0
193+
# CHECK-NEXT: [0,3] . DE . . . . . . . . . . . subw a0, a0, a0
194+
# CHECK-NEXT: [0,4] . DE. . . . . . . . . . . slli a0, a0, 4
195+
# CHECK-NEXT: [0,5] . DE . . . . . . . . . . slliw a0, a0, 4
196+
# CHECK-NEXT: [0,6] . DE . . . . . . . . . . srl a0, a0, a0
197+
# CHECK-NEXT: [0,7] . .DE . . . . . . . . . . srlw a0, a0, a0
198+
# CHECK-NEXT: [0,8] . . DeeE . . . . . . . . . mul a0, a0, a0
199+
# CHECK-NEXT: [0,9] . . DeeE . . . . . . . . . mulw a0, a0, a0
200+
# CHECK-NEXT: [0,10] . . . DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeE div a0, a0, a0
201+
# CHECK-NEXT: Truncated display due to cycle limit
106202

107203
# CHECK: Average Wait times (based on the timeline view):
108204
# CHECK-NEXT: [0]: Executions
@@ -115,12 +211,42 @@ sh1add a0, a0, a0
115211
# CHECK-NEXT: 1. 1 0.0 0.0 0.0 sub a1, a1, a1
116212
# CHECK-NEXT: 2. 1 0.0 0.0 0.0 addw a0, a0, a0
117213
# CHECK-NEXT: 3. 1 0.0 0.0 0.0 subw a0, a0, a0
118-
# CHECK-NEXT: 4. 1 0.0 0.0 0.0 mul a0, a0, a0
119-
# CHECK-NEXT: 5. 1 0.0 0.0 0.0 div a0, a0, a0
120-
# CHECK-NEXT: 6. 1 0.0 0.0 0.0 lb a0, 4(a1)
121-
# CHECK-NEXT: 7. 1 0.0 0.0 0.0 lw a0, 4(a1)
122-
# CHECK-NEXT: 8. 1 0.0 0.0 0.0 sb a0, 4(a1)
123-
# CHECK-NEXT: 9. 1 0.0 0.0 0.0 sw a0, 4(a1)
124-
# CHECK-NEXT: 10. 1 0.0 0.0 0.0 csrrw a0, mstatus, zero
125-
# CHECK-NEXT: 11. 1 0.0 0.0 0.0 sh1add a0, a0, a0
214+
# CHECK-NEXT: 4. 1 0.0 0.0 0.0 slli a0, a0, 4
215+
# CHECK-NEXT: 5. 1 0.0 0.0 0.0 slliw a0, a0, 4
216+
# CHECK-NEXT: 6. 1 0.0 0.0 0.0 srl a0, a0, a0
217+
# CHECK-NEXT: 7. 1 0.0 0.0 0.0 srlw a0, a0, a0
218+
# CHECK-NEXT: 8. 1 0.0 0.0 0.0 mul a0, a0, a0
219+
# CHECK-NEXT: 9. 1 0.0 0.0 0.0 mulw a0, a0, a0
220+
# CHECK-NEXT: 10. 1 0.0 0.0 0.0 div a0, a0, a0
221+
# CHECK-NEXT: 11. 1 0.0 0.0 0.0 divw a0, a0, a0
222+
# CHECK-NEXT: 12. 1 0.0 0.0 0.0 lb a0, 4(a1)
223+
# CHECK-NEXT: 13. 1 0.0 0.0 0.0 lh a0, 4(a1)
224+
# CHECK-NEXT: 14. 1 0.0 0.0 0.0 lw a0, 4(a1)
225+
# CHECK-NEXT: 15. 1 0.0 0.0 0.0 ld a0, 4(a1)
226+
# CHECK-NEXT: 16. 1 0.0 0.0 0.0 flw fa0, 4(a1)
227+
# CHECK-NEXT: 17. 1 0.0 0.0 0.0 fld fa0, 4(a1)
228+
# CHECK-NEXT: 18. 1 0.0 0.0 0.0 sb a0, 4(a1)
229+
# CHECK-NEXT: 19. 1 0.0 0.0 0.0 sh a0, 4(a1)
230+
# CHECK-NEXT: 20. 1 0.0 0.0 0.0 sw a0, 4(a1)
231+
# CHECK-NEXT: 21. 1 0.0 0.0 0.0 sd a0, 4(a1)
232+
# CHECK-NEXT: 22. 1 0.0 0.0 0.0 amoswap.w a0, a1, (a0)
233+
# CHECK-NEXT: 23. 1 0.0 0.0 0.0 amoswap.d a0, a1, (a0)
234+
# CHECK-NEXT: 24. 1 0.0 0.0 0.0 lr.w a0, (a0)
235+
# CHECK-NEXT: 25. 1 0.0 0.0 0.0 lr.d a0, (a0)
236+
# CHECK-NEXT: 26. 1 0.0 0.0 0.0 sc.w a0, a1, (a0)
237+
# CHECK-NEXT: 27. 1 0.0 0.0 0.0 sc.d a0, a1, (a0)
238+
# CHECK-NEXT: 28. 1 0.0 0.0 0.0 csrrw a0, mstatus, zero
239+
# CHECK-NEXT: 29. 1 0.0 0.0 0.0 sh1add a0, a0, a0
240+
# CHECK-NEXT: 30. 1 0.0 0.0 0.0 sh1add.uw a0, a0, a0
241+
# CHECK-NEXT: 31. 1 0.0 0.0 0.0 rori a0, a0, 4
242+
# CHECK-NEXT: 32. 1 0.0 0.0 0.0 roriw a0, a0, 4
243+
# CHECK-NEXT: 33. 1 0.0 0.0 0.0 rol a0, a0, a0
244+
# CHECK-NEXT: 34. 1 0.0 0.0 0.0 rolw a0, a0, a0
245+
# CHECK-NEXT: 35. 1 0.0 0.0 0.0 clz a0, a0
246+
# CHECK-NEXT: 36. 1 0.0 0.0 0.0 clzw a0, a0
247+
# CHECK-NEXT: 37. 1 0.0 0.0 0.0 clmul a0, a0, a0
248+
# CHECK-NEXT: 38. 1 0.0 0.0 0.0 bclri a0, a0, 4
249+
# CHECK-NEXT: 39. 1 0.0 0.0 0.0 bclr a0, a0, a0
250+
# CHECK-NEXT: 40. 1 0.0 0.0 0.0 bexti a0, a0, 4
251+
# CHECK-NEXT: 41. 1 0.0 0.0 0.0 bext a0, a0, a0
126252
# CHECK-NEXT: 1 0.0 0.0 0.0 <total>

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