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Use assume instead of and for the tests
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‎llvm/test/Transforms/InstCombine/range-check.ll‎

Lines changed: 40 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -34,15 +34,17 @@ define i1 @test_and1_logical(i32 %x, i32 %n) {
3434

3535
define i1 @test_and1_sext(i32 %x, i64 %n) {
3636
; CHECK-LABEL: @test_and1_sext(
37-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
37+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
38+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
3839
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
3940
; CHECK-NEXT: [[C:%.*]] = icmp ugt i64 [[NN]], [[X_SEXT]]
4041
; CHECK-NEXT: ret i1 [[C]]
4142
;
42-
%nn = and i64 %n, 2147483647
43+
%n_not_negative = icmp sge i64 %n, 0
44+
call void @llvm.assume(i1 %n_not_negative)
4345
%x_sext = sext i32 %x to i64
4446
%a = icmp sge i32 %x, 0
45-
%b = icmp slt i64 %x_sext, %nn
47+
%b = icmp slt i64 %x_sext, %n
4648
%c = and i1 %a, %b
4749
ret i1 %c
4850
}
@@ -77,15 +79,17 @@ define i1 @test_and2_logical(i32 %x, i32 %n) {
7779

7880
define i1 @test_and2_sext(i32 %x, i64 %n) {
7981
; CHECK-LABEL: @test_and2_sext(
80-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
82+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
83+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
8184
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
8285
; CHECK-NEXT: [[C:%.*]] = icmp uge i64 [[NN]], [[X_SEXT]]
8386
; CHECK-NEXT: ret i1 [[C]]
8487
;
85-
%nn = and i64 %n, 2147483647
88+
%n_not_negative = icmp sge i64 %n, 0
89+
call void @llvm.assume(i1 %n_not_negative)
8690
%x_sext = sext i32 %x to i64
8791
%a = icmp sgt i32 %x, -1
88-
%b = icmp sle i64 %x_sext, %nn
92+
%b = icmp sle i64 %x_sext, %n
8993
%c = and i1 %a, %b
9094
ret i1 %c
9195
}
@@ -118,14 +122,16 @@ define i1 @test_and3_logical(i32 %x, i32 %n) {
118122

119123
define i1 @test_and3_sext(i32 %x, i64 %n) {
120124
; CHECK-LABEL: @test_and3_sext(
121-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
125+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
126+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
122127
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
123128
; CHECK-NEXT: [[C:%.*]] = icmp ugt i64 [[NN]], [[X_SEXT]]
124129
; CHECK-NEXT: ret i1 [[C]]
125130
;
126-
%nn = and i64 %n, 2147483647
131+
%n_not_negative = icmp sge i64 %n, 0
132+
call void @llvm.assume(i1 %n_not_negative)
127133
%x_sext = sext i32 %x to i64
128-
%a = icmp sgt i64 %nn, %x_sext
134+
%a = icmp sgt i64 %n, %x_sext
129135
%b = icmp sge i32 %x, 0
130136
%c = and i1 %a, %b
131137
ret i1 %c
@@ -159,14 +165,16 @@ define i1 @test_and4_logical(i32 %x, i32 %n) {
159165

160166
define i1 @test_and4_sext(i32 %x, i64 %n) {
161167
; CHECK-LABEL: @test_and4_sext(
162-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
168+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
169+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
163170
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
164171
; CHECK-NEXT: [[C:%.*]] = icmp uge i64 [[NN]], [[X_SEXT]]
165172
; CHECK-NEXT: ret i1 [[C]]
166173
;
167-
%nn = and i64 %n, 2147483647
174+
%n_not_negative = icmp sge i64 %n, 0
175+
call void @llvm.assume(i1 %n_not_negative)
168176
%x_sext = sext i32 %x to i64
169-
%a = icmp sge i64 %nn, %x_sext
177+
%a = icmp sge i64 %n, %x_sext
170178
%b = icmp sge i32 %x, 0
171179
%c = and i1 %a, %b
172180
ret i1 %c
@@ -202,15 +210,17 @@ define i1 @test_or1_logical(i32 %x, i32 %n) {
202210

203211
define i1 @test_or1_sext(i32 %x, i64 %n) {
204212
; CHECK-LABEL: @test_or1_sext(
205-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
213+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
214+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
206215
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
207216
; CHECK-NEXT: [[C:%.*]] = icmp ule i64 [[NN]], [[X_SEXT]]
208217
; CHECK-NEXT: ret i1 [[C]]
209218
;
210-
%nn = and i64 %n, 2147483647
219+
%n_not_negative = icmp sge i64 %n, 0
220+
call void @llvm.assume(i1 %n_not_negative)
211221
%x_sext = sext i32 %x to i64
212222
%a = icmp slt i32 %x, 0
213-
%b = icmp sge i64 %x_sext, %nn
223+
%b = icmp sge i64 %x_sext, %n
214224
%c = or i1 %a, %b
215225
ret i1 %c
216226
}
@@ -245,15 +255,17 @@ define i1 @test_or2_logical(i32 %x, i32 %n) {
245255

246256
define i1 @test_or2_sext(i32 %x, i64 %n) {
247257
; CHECK-LABEL: @test_or2_sext(
248-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
258+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
259+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
249260
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
250261
; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[NN]], [[X_SEXT]]
251262
; CHECK-NEXT: ret i1 [[C]]
252263
;
253-
%nn = and i64 %n, 2147483647
264+
%n_not_negative = icmp sge i64 %n, 0
265+
call void @llvm.assume(i1 %n_not_negative)
254266
%x_sext = sext i32 %x to i64
255267
%a = icmp sle i32 %x, -1
256-
%b = icmp sgt i64 %x_sext, %nn
268+
%b = icmp sgt i64 %x_sext, %n
257269
%c = or i1 %a, %b
258270
ret i1 %c
259271
}
@@ -286,14 +298,16 @@ define i1 @test_or3_logical(i32 %x, i32 %n) {
286298

287299
define i1 @test_or3_sext(i32 %x, i64 %n) {
288300
; CHECK-LABEL: @test_or3_sext(
289-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
301+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
302+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
290303
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
291304
; CHECK-NEXT: [[C:%.*]] = icmp ule i64 [[NN]], [[X_SEXT]]
292305
; CHECK-NEXT: ret i1 [[C]]
293306
;
294-
%nn = and i64 %n, 2147483647
307+
%n_not_negative = icmp sge i64 %n, 0
308+
call void @llvm.assume(i1 %n_not_negative)
295309
%x_sext = sext i32 %x to i64
296-
%a = icmp sle i64 %nn, %x_sext
310+
%a = icmp sle i64 %n, %x_sext
297311
%b = icmp slt i32 %x, 0
298312
%c = or i1 %a, %b
299313
ret i1 %c
@@ -327,14 +341,16 @@ define i1 @test_or4_logical(i32 %x, i32 %n) {
327341

328342
define i1 @test_or4_sext(i32 %x, i64 %n) {
329343
; CHECK-LABEL: @test_or4_sext(
330-
; CHECK-NEXT: [[NN:%.*]] = and i64 [[N:%.*]], 2147483647
344+
; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
345+
; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
331346
; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
332347
; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[NN]], [[X_SEXT]]
333348
; CHECK-NEXT: ret i1 [[C]]
334349
;
335-
%nn = and i64 %n, 2147483647
350+
%n_not_negative = icmp sge i64 %n, 0
351+
call void @llvm.assume(i1 %n_not_negative)
336352
%x_sext = sext i32 %x to i64
337-
%a = icmp slt i64 %nn, %x_sext
353+
%a = icmp slt i64 %n, %x_sext
338354
%b = icmp slt i32 %x, 0
339355
%c = or i1 %a, %b
340356
ret i1 %c

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