Skip to content

Commit 107c1db

Browse files
committed
Tablegen simple
1 parent e6ec07b commit 107c1db

File tree

6 files changed

+80
-33
lines changed

6 files changed

+80
-33
lines changed

llvm/include/llvm/IR/IntrinsicsDirectX.td

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,5 @@ def int_dx_discard : DefaultAttrsIntrinsic<[], [llvm_i1_ty], []>;
108108
def int_dx_firstbituhigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
109109
def int_dx_firstbitshigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
110110

111-
def int_dx_memory_barrier : DefaultAttrsIntrinsic<[], [llvm_i32_ty], []>;
112111
def int_dx_group_memory_barrier_with_group_sync : DefaultAttrsIntrinsic<[], [], []>;
113112
}

llvm/lib/Target/DirectX/DXIL.td

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -294,6 +294,11 @@ class Attributes<Version ver = DXIL1_0, list<DXILAttribute> attrs> {
294294
list<DXILAttribute> op_attrs = attrs;
295295
}
296296

297+
class IntrinsicSelect<Intrinsic intr, list<string> extra_args> {
298+
Intrinsic Intr = intr;
299+
list<string> ExtraArgs = extra_args;
300+
}
301+
297302
// Abstraction DXIL Operation
298303
class DXILOp<int opcode, DXILOpClass opclass> {
299304
// A short description of the operation
@@ -308,6 +313,8 @@ class DXILOp<int opcode, DXILOpClass opclass> {
308313
// LLVM Intrinsic DXIL Operation maps to
309314
Intrinsic LLVMIntrinsic = ?;
310315

316+
list<IntrinsicSelect> intrinsic_selects = [];
317+
311318
// Result type of the op
312319
DXILOpParamType result;
313320

@@ -916,7 +923,12 @@ def WaveAllBitCount : DXILOp<135, waveAllOp> {
916923

917924
def Barrier : DXILOp<80, barrier> {
918925
let Doc = "inserts a memory barrier in the shader";
919-
let LLVMIntrinsic = int_dx_memory_barrier;
926+
let intrinsic_selects = [
927+
IntrinsicSelect<
928+
int_dx_group_memory_barrier_with_group_sync,
929+
[ "OpBuilder.getIRB().getInt32((unsigned)BarrierMode::SyncThreadGroup | (unsigned)BarrierMode::TGSMFence)" ]>,
930+
];
931+
920932
let arguments = [Int32Ty];
921933
let result = VoidTy;
922934
let stages = [Stages<DXIL1_0, [compute, library]>];

llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,6 @@
1111
//===----------------------------------------------------------------------===//
1212

1313
#include "DXILIntrinsicExpansion.h"
14-
#include "DXILConstants.h"
1514
#include "DirectX.h"
1615
#include "llvm/ADT/STLExtras.h"
1716
#include "llvm/ADT/SmallVector.h"
@@ -68,7 +67,6 @@ static bool isIntrinsicExpansion(Function &F) {
6867
case Intrinsic::dx_sign:
6968
case Intrinsic::dx_step:
7069
case Intrinsic::dx_radians:
71-
case Intrinsic::dx_group_memory_barrier_with_group_sync:
7270
return true;
7371
}
7472
return false;
@@ -603,9 +601,6 @@ static bool expandIntrinsic(Function &F, CallInst *Orig) {
603601
case Intrinsic::dx_radians:
604602
Result = expandRadiansIntrinsic(Orig);
605603
break;
606-
case Intrinsic::dx_group_memory_barrier_with_group_sync:
607-
Result = expandMemoryBarrier(Orig, IntrinsicId);
608-
break;
609604
}
610605
if (Result) {
611606
Orig->replaceAllUsesWith(Result);

llvm/lib/Target/DirectX/DXILOpLowering.cpp

Lines changed: 13 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -106,20 +106,21 @@ class OpLowerer {
106106
return false;
107107
}
108108

109-
[[nodiscard]]
110-
bool replaceFunctionWithOp(Function &F, dxil::OpCode DXILOp) {
109+
[[nodiscard]] bool replaceFunctionWithOp(Function &F, dxil::OpCode DXILOp,
110+
ArrayRef<Value *> ExtraArgs) {
111111
bool IsVectorArgExpansion = isVectorArgExpansion(F);
112112
return replaceFunction(F, [&](CallInst *CI) -> Error {
113-
SmallVector<Value *> Args;
114-
OpBuilder.getIRB().SetInsertPoint(CI);
113+
SmallVector<Value *> NewArgs;
115114
if (IsVectorArgExpansion) {
116-
SmallVector<Value *> NewArgs = argVectorFlatten(CI, OpBuilder.getIRB());
117-
Args.append(NewArgs.begin(), NewArgs.end());
115+
NewArgs = argVectorFlatten(CI, OpBuilder.getIRB());
118116
} else
119-
Args.append(CI->arg_begin(), CI->arg_end());
117+
NewArgs.append(CI->arg_begin(), CI->arg_end());
120118

121-
Expected<CallInst *> OpCall =
122-
OpBuilder.tryCreateOp(DXILOp, Args, CI->getName(), F.getReturnType());
119+
NewArgs.append(ExtraArgs.begin(), ExtraArgs.end());
120+
121+
OpBuilder.getIRB().SetInsertPoint(CI);
122+
Expected<CallInst *> OpCall = OpBuilder.tryCreateOp(
123+
DXILOp, NewArgs, CI->getName(), F.getReturnType());
123124
if (Error E = OpCall.takeError())
124125
return E;
125126

@@ -641,9 +642,9 @@ class OpLowerer {
641642
switch (ID) {
642643
default:
643644
continue;
644-
#define DXIL_OP_INTRINSIC(OpCode, Intrin) \
645-
case Intrin: \
646-
HasErrors |= replaceFunctionWithOp(F, OpCode); \
645+
#define DXIL_OP_INTRINSIC(OpCode, Intrin, ExtraArgs) \
646+
case Intrin: \
647+
HasErrors |= replaceFunctionWithOp(F, OpCode, ExtraArgs); \
647648
break;
648649
#include "DXILOperation.inc"
649650
case Intrinsic::dx_handle_fromBinding:

llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: opt -S -dxil-intrinsic-expansion -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
1+
; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library < %s | FileCheck %s --check-prefix=CHECK
22

33
define void @test_group_memory_barrier_with_group_sync() {
44
entry:

llvm/utils/TableGen/DXILEmitter.cpp

Lines changed: 53 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,11 @@ using namespace llvm::dxil;
3232

3333
namespace {
3434

35+
struct DXILIntrinsicSelect {
36+
StringRef Intrinsic;
37+
SmallVector<StringRef, 4> ExtraArgs;
38+
};
39+
3540
struct DXILOperationDesc {
3641
std::string OpName; // name of DXIL operation
3742
int OpCode; // ID of DXIL operation
@@ -42,8 +47,7 @@ struct DXILOperationDesc {
4247
SmallVector<const Record *> OverloadRecs;
4348
SmallVector<const Record *> StageRecs;
4449
SmallVector<const Record *> AttrRecs;
45-
StringRef Intrinsic; // The llvm intrinsic map to OpName. Default is "" which
46-
// means no map exists
50+
SmallVector<DXILIntrinsicSelect> IntrinsicSelects;
4751
SmallVector<StringRef, 4>
4852
ShaderStages; // shader stages to which this applies, empty for all.
4953
int OverloadParamIndex; // Index of parameter with overload type.
@@ -157,14 +161,43 @@ DXILOperationDesc::DXILOperationDesc(const Record *R) {
157161
OpName);
158162
}
159163

160-
const RecordVal *RV = R->getValue("LLVMIntrinsic");
161-
if (RV && RV->getValue()) {
162-
if (const DefInit *DI = dyn_cast<DefInit>(RV->getValue())) {
163-
auto *IntrinsicDef = DI->getDef();
164-
auto DefName = IntrinsicDef->getName();
165-
assert(DefName.starts_with("int_") && "invalid intrinsic name");
166-
// Remove the int_ from intrinsic name.
167-
Intrinsic = DefName.substr(4);
164+
auto GetIntrinsicName = [](const RecordVal *RV) -> StringRef {
165+
if (RV && RV->getValue()) {
166+
if (const DefInit *DI = dyn_cast<DefInit>(RV->getValue())) {
167+
auto *IntrinsicDef = DI->getDef();
168+
auto DefName = IntrinsicDef->getName();
169+
assert(DefName.starts_with("int_") && "invalid intrinsic name");
170+
// Remove the int_ from intrinsic name.
171+
return DefName.substr(4);
172+
}
173+
}
174+
return "";
175+
};
176+
177+
{
178+
DXILIntrinsicSelect IntrSelect;
179+
IntrSelect.Intrinsic = GetIntrinsicName(R->getValue("LLVMIntrinsic"));
180+
if (IntrSelect.Intrinsic.size())
181+
IntrinsicSelects.emplace_back(std::move(IntrSelect));
182+
}
183+
184+
Recs = R->getValueAsListOfDefs("intrinsic_selects");
185+
if (Recs.size()) {
186+
if (IntrinsicSelects.size()) {
187+
PrintFatalError(R,
188+
Twine("LLVMIntrinsic and intrinsic_match cannot be both "
189+
"defined for DXIL operation - ") +
190+
OpName);
191+
} else {
192+
for (const Record *R : Recs) {
193+
DXILIntrinsicSelect IntrSelect;
194+
IntrSelect.Intrinsic = GetIntrinsicName(R->getValue("Intr"));
195+
auto ExtraArgs = R->getValueAsListOfStrings("ExtraArgs");
196+
for (StringRef Arg : ExtraArgs) {
197+
IntrSelect.ExtraArgs.push_back(Arg);
198+
}
199+
IntrinsicSelects.emplace_back(std::move(IntrSelect));
200+
}
168201
}
169202
}
170203
}
@@ -377,10 +410,17 @@ static void emitDXILIntrinsicMap(ArrayRef<DXILOperationDesc> Ops,
377410
OS << "#ifdef DXIL_OP_INTRINSIC\n";
378411
OS << "\n";
379412
for (const auto &Op : Ops) {
380-
if (Op.Intrinsic.empty())
413+
if (Op.IntrinsicSelects.empty()) {
381414
continue;
382-
OS << "DXIL_OP_INTRINSIC(dxil::OpCode::" << Op.OpName
383-
<< ", Intrinsic::" << Op.Intrinsic << ")\n";
415+
}
416+
for (const DXILIntrinsicSelect &MappedIntr : Op.IntrinsicSelects) {
417+
OS << "DXIL_OP_INTRINSIC(dxil::OpCode::" << Op.OpName
418+
<< ", Intrinsic::" << MappedIntr.Intrinsic << ", (ArrayRef<Value *> {";
419+
for (const StringRef &Arg : MappedIntr.ExtraArgs) {
420+
OS << Arg << ", ";
421+
}
422+
OS << "}))\n";
423+
}
384424
}
385425
OS << "\n";
386426
OS << "#undef DXIL_OP_INTRINSIC\n";

0 commit comments

Comments
 (0)