@@ -3856,29 +3856,6 @@ def int_aarch64_sve_famin_u : AdvSIMD_Pred2VectorArg_Intrinsic;
38563856def int_aarch64_neon_famax : AdvSIMD_2VectorArg_Intrinsic;
38573857def int_aarch64_neon_famin : AdvSIMD_2VectorArg_Intrinsic;
38583858
3859-
3860- // SME FP8 FDOT intrinsics
3861- let TargetPrefix = "aarch64" in {
3862-
3863- class SME2_FP8_FDOT_MULTI_VG1x2 :
3864- DefaultAttrsIntrinsic<[], [llvm_i32_ty,
3865- llvm_nxv16i8_ty, llvm_nxv16i8_ty,
3866- llvm_nxv16i8_ty, llvm_nxv16i8_ty],
3867- [IntrInaccessibleMemOnly, IntrHasSideEffects]>;
3868-
3869- class SME2_FP8_FDOT_MULTI_VG1x4 :
3870- DefaultAttrsIntrinsic<[], [llvm_i32_ty,
3871- llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty,
3872- llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty, llvm_nxv16i8_ty],
3873- [IntrInaccessibleMemOnly, IntrHasSideEffects]>;
3874-
3875- def int_aarch64_sme_fp8_fdot_multi_za16_vg1x2 : SME2_FP8_FDOT_MULTI_VG1x2;
3876- def int_aarch64_sme_fp8_fdot_multi_za16_vg1x4 : SME2_FP8_FDOT_MULTI_VG1x4;
3877-
3878- def int_aarch64_sme_fp8_fdot_multi_za32_vg1x2 : SME2_FP8_FDOT_MULTI_VG1x2;
3879- def int_aarch64_sme_fp8_fdot_multi_za32_vg1x4 : SME2_FP8_FDOT_MULTI_VG1x4;
3880- }
3881-
38823859//
38833860// FP8 Intrinsics
38843861//
@@ -4079,6 +4056,12 @@ let TargetPrefix = "aarch64" in {
40794056
40804057 def int_aarch64_sme_fp8_fdot_single_za16_vg1x4 : SME_FP8_ZA_SINGLE_VGx4_Intrinsic;
40814058 def int_aarch64_sme_fp8_fdot_single_za32_vg1x4 : SME_FP8_ZA_SINGLE_VGx4_Intrinsic;
4059+ // Multi
4060+ def int_aarch64_sme_fp8_fdot_multi_za16_vg1x2 : SME_FP8_ZA_MULTI_VGx2_Intrinsic;
4061+ def int_aarch64_sme_fp8_fdot_multi_za32_vg1x2 : SME_FP8_ZA_MULTI_VGx2_Intrinsic;
4062+
4063+ def int_aarch64_sme_fp8_fdot_multi_za16_vg1x4 : SME_FP8_ZA_MULTI_VGx4_Intrinsic;
4064+ def int_aarch64_sme_fp8_fdot_multi_za32_vg1x4 : SME_FP8_ZA_MULTI_VGx4_Intrinsic;
40824065
40834066 // FVDOT
40844067 def int_aarch64_sme_fp8_fvdot_lane_za16_vg1x2 : SME_FP8_ZA_LANE_VGx2_Intrinsic;
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