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Add more clarifications in the comments
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llvm/lib/Target/RISCV/RISCVInstrInfoV.td

Lines changed: 5 additions & 3 deletions
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@@ -116,9 +116,11 @@ class SchedCommon<list<SchedWrite> writes, list<SchedRead> reads,
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// If this is a _TIED + masked operation, $rs2 (i.e. the first operand) is
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// merged with the mask.
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// NOTE: the following if statement is written in such a weird way because
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// TableGen's `!if` doesn't have a proper short-circuit behavior, so if the
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// predicate of this `!if` cannot be resolved right away, `!tail(reads)` will
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// still be resolved right away even when `reads` is empty, which leads to
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// should we want to write something like
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// `!if(!and(!not(!empty(reads), isTiedMasked), !tail(reads), reads)`
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// since `!if` doesn't have a proper short-circuit behavior, if the
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// condition of this `!if` cannot be resolved right away, `!tail(reads)` will
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// be immediately evaluated anyway even when `reads` is empty, which leads to
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// an assertion failure.
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defvar readsWithTiedMask =
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!if(isTiedMasked, !if(!not(!empty(reads)), !tail(reads), reads), reads);

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