[NFCI][lldb][test][asm] Enable AT&T syntax explicitly

Implementation files using the Intel syntax typically explicitly specify it.
Do the same for the few files using AT&T syntax.

This enables building LLVM with `-mllvm -x86-asm-syntax=intel` in one's Clang config files
(i.e. a global preference for Intel syntax).

Author: tambry

lldb/test/API/functionalities/disassembler-variables/d_original_example.s

@@ -1,13 +1,14 @@
 /* Original C (for context):
 * #include <stdio.h>
-* 
+*
 * int main(int argc, char **argv) {
 *   for (int i = 1; i < argc; ++i)
 *     puts(argv[i]);
 *   return 0;
 * }
 */
 	.file	"d_original_example.c"
+	.att_syntax
 	.text
 	.globl	main                            # -- Begin function main
 	.p2align	4

lldb/test/API/functionalities/disassembler-variables/live_across_call.s

@@ -1,7 +1,7 @@
 /* Original C (for context):
 * // Declare a real external call so the compiler must respect ABI clobbers.
 * extern int leaf(int) __attribute__((noinline));
-* 
+*
 * __attribute__((noinline))
 * int live_across_call(int x) {
 *   volatile int a = x;                // a starts in a GPR (from arg)
@@ -12,6 +12,7 @@
 * }
 */
 	.file	"live_across_call.c"
+	.att_syntax
 	.text
 	.globl	live_across_call                # -- Begin function live_across_call
 	.p2align	4

lldb/test/API/functionalities/disassembler-variables/loop_reg_rotate.s

@@ -3,7 +3,7 @@
 * int loop_reg_rotate(int n, int seed) {
 *   volatile int acc = seed;    // keep as a named local
 *   int i = 0, j = 1, k = 2;    // extra pressure but not enough to spill
-* 
+*
 *   for (int t = 0; t < n; ++t) {
 *     // Mix uses so the allocator may reshuffle regs for 'acc'
 *     acc = acc + i;
@@ -13,12 +13,13 @@
 *     acc = acc + k;
 *     i ^= acc; j += acc; k ^= j;
 *   }
-* 
+*
 *   asm volatile("" :: "r"(acc));
 *   return acc + i + j + k;
 * }
 */
 	.file	"loop_reg_rotate.c"
+	.att_syntax
 	.text
 	.globl	loop_reg_rotate                 # -- Begin function loop_reg_rotate
 	.p2align	4

lldb/test/API/functionalities/disassembler-variables/regs_fp_params.s

@@ -5,6 +5,7 @@
 *   return a + b + c + d + e + f;
 * }*/
 	.file	"regs_fp_params.c"
+	.att_syntax
 	.text
 	.globl	regs_fp_params                  # -- Begin function regs_fp_params
 	.p2align	4

lldb/test/API/functionalities/disassembler-variables/regs_int_params.s

@@ -8,6 +8,7 @@
 * }
 */
 	.file	"regs_int_params.c"
+	.att_syntax
 	.text
 	.globl	regs_int_params                 # -- Begin function regs_int_params
 	.p2align	4

lldb/test/API/functionalities/disassembler-variables/regs_mixed_params.s

@@ -11,6 +11,7 @@
 */
 	.file	"regs_mixed_params.c"
 	.file	0 "." "regs_mixed_params.c" md5 0x73c4bda40238ae460aaecb3a6a2603cf
+	.att_syntax
 	.text
 	.globl	regs_mixed_params               # -- Begin function regs_mixed_params
 	.p2align	4

lldb/test/API/functionalities/disassembler-variables/seed_reg_const_undef.s

@@ -10,6 +10,7 @@
 */
 
 	.file	"seed_reg_const_undef.c"
+	.att_syntax
 	.text
 	.globl	main                            # -- Begin function main
 	.p2align	4

lldb/test/Shell/SymbolFile/DWARF/x86/DW_TAG_GNU_call_site-DW_AT_low_pc.s

@@ -27,6 +27,7 @@
 #   return 0;
 # }
 
+	.att_syntax
 	.text
 .Ltext0:
 	.type	b, @function

lldb/test/Shell/SymbolFile/DWARF/x86/DW_TAG_variable-DW_AT_decl_file-DW_AT_abstract_origin-crosscu1.s

@@ -24,6 +24,7 @@
 # CHECK: inlinevar.h:2: (int) var = {{.*}}
 # Unfixed LLDB did show only: (int) var = {{.*}}
 
+	.att_syntax
 	.text
 	.file	"inlinevar1.c"
 	.file	1 "" "./inlinevarother.h"

lldb/test/Shell/SymbolFile/DWARF/x86/Inputs/DW_TAG_variable-DW_AT_decl_file-DW_AT_abstract_origin-crosscu2.s

@@ -1,3 +1,4 @@
+	.att_syntax
 	.text
 	.file	"inlinevar2.c"
 	.globl	other                       # -- Begin function other