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3 files changed

+21
-17
lines changed

3 files changed

+21
-17
lines changed

llvm/include/llvm/CodeGen/BasicTTIImpl.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1243,7 +1243,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
12431243
EVT ExtVT = EVT::getEVT(Dst);
12441244
EVT LoadVT = EVT::getEVT(Src);
12451245
unsigned LType =
1246-
((Opcode == Instruction::ZExt) ? ISD::ZEXTLOAD : ISD::SEXTLOAD);
1246+
((Opcode == Instruction::ZExt) ? ISD::ZEXTLOAD : ISD::SEXTLOAD);
12471247

12481248
if (I) {
12491249
if (auto *LI = dyn_cast<LoadInst>(I->getOperand(0))) {
@@ -1253,18 +1253,19 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
12531253
return 0;
12541254
} else if (auto *II = dyn_cast<IntrinsicInst>(I->getOperand(0))) {
12551255
switch (II->getIntrinsicID()) {
1256-
case Intrinsic::masked_load: {
1257-
auto *PtrType = II->getArgOperand(0)->getType();
1258-
assert(PtrType->isPointerTy());
1259-
1260-
if (DstLT.first == SrcLT.first &&
1261-
TLI->isLoadExtLegal(LType, ExtVT, LoadVT,
1262-
PtrType->getPointerAddressSpace()))
1263-
return 0;
1264-
1265-
break;
1266-
}
1267-
default: break;
1256+
case Intrinsic::masked_load: {
1257+
auto *PtrType = II->getArgOperand(0)->getType();
1258+
assert(PtrType->isPointerTy());
1259+
1260+
if (DstLT.first == SrcLT.first &&
1261+
TLI->isLoadExtLegal(LType, ExtVT, LoadVT,
1262+
PtrType->getPointerAddressSpace()))
1263+
return 0;
1264+
1265+
break;
1266+
}
1267+
default:
1268+
break;
12681269
}
12691270
}
12701271
}

llvm/include/llvm/CodeGen/TargetLowering.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1487,7 +1487,9 @@ class LLVM_ABI TargetLoweringBase {
14871487
(uint64_t)AddrSpace;
14881488

14891489
if (LoadExtActionOverrides.count(OverrideKey)) {
1490-
return (LegalizeAction)((LoadExtActionOverrides.at(OverrideKey) >> Shift) & 0xf);
1490+
return (
1491+
LegalizeAction)((LoadExtActionOverrides.at(OverrideKey) >> Shift) &
1492+
0xf);
14911493
}
14921494
return (LegalizeAction)((LoadExtActions[ValI][MemI] >> Shift) & 0xf);
14931495
}

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6968,8 +6968,8 @@ bool DAGCombiner::isLegalNarrowLdSt(LSBaseSDNode *LDST,
69686968
if (!SDValue(Load, 0).hasOneUse())
69696969
return false;
69706970

6971-
if (LegalOperations && !TLI.isLoadExtLegal(ExtType, Load->getValueType(0), MemVT,
6972-
Load->getAddressSpace()))
6971+
if (LegalOperations && !TLI.isLoadExtLegal(ExtType, Load->getValueType(0),
6972+
MemVT, Load->getAddressSpace()))
69736973
return false;
69746974

69756975
// For the transform to be legal, the load must produce only two values
@@ -7827,7 +7827,8 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
78277827
APInt ExtBits = APInt::getHighBitsSet(ExtBitSize, ExtBitSize - MemBitSize);
78287828
if (DAG.MaskedValueIsZero(N1, ExtBits) &&
78297829
((!LegalOperations && LN0->isSimple()) ||
7830-
TLI.isLoadExtLegal(ISD::ZEXTLOAD, VT, MemVT, LN0->getAddressSpace()))) {
7830+
TLI.isLoadExtLegal(ISD::ZEXTLOAD, VT, MemVT,
7831+
LN0->getAddressSpace()))) {
78317832
SDValue ExtLoad =
78327833
DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(N0), VT, LN0->getChain(),
78337834
LN0->getBasePtr(), MemVT, LN0->getMemOperand());

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