Pass subtargetinfo as function argument

Follows up on discussion from linked pull request that has been closed. Essentially, not having a target specific factory method

Author: arjunUpatel

llvm/include/llvm/MC/MCInstrAnalysis.h

@@ -19,6 +19,7 @@
 #include "llvm/MC/MCInstrDesc.h"
 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/Compiler.h"
 #include <cstdint>
 #include <vector>
@@ -185,7 +186,7 @@ class LLVM_ABI MCInstrAnalysis {
   /// Given an instruction that accesses a memory address, try to compute
   /// the target address. Return true on success, and the address in \p Target.
   virtual bool evaluateInstruction(const MCInst &Inst, uint64_t Addr,
-                                   uint64_t Size, uint64_t &Target) const;
+                                   uint64_t Size, uint64_t &Target, const MCSubtargetInfo &STI) const;
 
   /// Given an instruction tries to get the address of a memory operand. Returns
   /// the address on success.

llvm/lib/MC/MCInstrAnalysis.cpp

@@ -32,7 +32,8 @@ bool MCInstrAnalysis::evaluateBranch(const MCInst & /*Inst*/, uint64_t /*Addr*/,
 
 bool MCInstrAnalysis::evaluateInstruction(const MCInst &Inst, uint64_t Addr,
                                           uint64_t Size,
-                                          uint64_t &Target) const {
+                                          uint64_t &Target,
+                                          const MCSubtargetInfo &STI) const {
   return false;
 }
 

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

@@ -131,7 +131,6 @@ namespace {
 class RISCVMCInstrAnalysis : public MCInstrAnalysis {
   int64_t GPRState[31] = {};
   std::bitset<31> GPRValidMask;
-  unsigned int ArchRegWidth;
 
   static bool isGPR(MCRegister Reg) {
     return Reg >= RISCV::X0 && Reg <= RISCV::X31;
@@ -168,8 +167,8 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
   }
 
 public:
-  explicit RISCVMCInstrAnalysis(const MCInstrInfo *Info, unsigned int ArchRegWidth)
-      : MCInstrAnalysis(Info), ArchRegWidth(ArchRegWidth) {}
+  explicit RISCVMCInstrAnalysis(const MCInstrInfo *Info)
+      : MCInstrAnalysis(Info) {}
 
   void resetState() override { GPRValidMask.reset(); }
 
@@ -245,7 +244,8 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
   }
 
   bool evaluateInstruction(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                           uint64_t &Target) const override {
+                           uint64_t &Target, const MCSubtargetInfo &STI) const override {
+    unsigned int ArchRegWidth = STI.getTargetTriple().getArchPointerBitWidth();
     switch(Inst.getOpcode()) {
     default:
       return false;
@@ -420,12 +420,8 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
 
 } // end anonymous namespace
 
-static MCInstrAnalysis *createRISCV32InstrAnalysis(const MCInstrInfo *Info) {
-  return new RISCVMCInstrAnalysis(Info, 32);
-}
-
-static MCInstrAnalysis *createRISCV64InstrAnalysis(const MCInstrInfo *Info) {
-  return new RISCVMCInstrAnalysis(Info, 64);
+static MCInstrAnalysis *createRISCVInstrAnalysis(const MCInstrInfo *Info) {
+  return new RISCVMCInstrAnalysis(Info);
 }
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetMC() {
@@ -446,9 +442,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetMC() {
     // Register the null target streamer.
     TargetRegistry::RegisterNullTargetStreamer(*T,
                                                createRISCVNullTargetStreamer);
+    TargetRegistry::RegisterMCInstrAnalysis(*T,
+                                            createRISCVInstrAnalysis);
   }
-  TargetRegistry::RegisterMCInstrAnalysis(getTheRISCV32Target(),
-                                          createRISCV32InstrAnalysis);
-  TargetRegistry::RegisterMCInstrAnalysis(getTheRISCV64Target(),
-                                          createRISCV64InstrAnalysis);
 }

llvm/tools/llvm-objdump/llvm-objdump.cpp

@@ -2358,7 +2358,7 @@ disassembleObject(ObjectFile &Obj, const ObjectFile &DbgObj,
             bool PrintTarget = DT->InstrAnalysis->evaluateBranch(
                                    Inst, SectionAddr + Index, Size, Target) ||
                                DT->InstrAnalysis->evaluateInstruction(
-                                   Inst, SectionAddr + Index, Size, Target);
+                                   Inst, SectionAddr + Index, Size, Target, *DT->SubtargetInfo);
             if (!PrintTarget) {
               if (std::optional<uint64_t> MaybeTarget =
                       DT->InstrAnalysis->evaluateMemoryOperandAddress(