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remove undef test
1 parent 809ffb5 commit 11f6c0b

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2 files changed

+1
-69
lines changed

2 files changed

+1
-69
lines changed

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -476,7 +476,7 @@ static cl::opt<bool> HasClosedWorldAssumption(
476476
"amdgpu-link-time-closed-world",
477477
cl::desc("Whether has closed-world assumption at link time"),
478478
cl::init(false), cl::Hidden);
479-
479+
480480
static cl::opt<bool> EnableUniformIntrinsicCombine(
481481
"amdgpu-enable-uniform-intrinsic-combine",
482482
cl::desc("Enable/Disable the Uniform Intrinsic Combine Pass"),

llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine.ll

Lines changed: 0 additions & 68 deletions
Original file line numberDiff line numberDiff line change
@@ -19,23 +19,6 @@ define amdgpu_kernel void @permlane64_constant(ptr addrspace(1) %out) {
1919
ret void
2020
}
2121

22-
define amdgpu_kernel void @permlane64_undef(ptr addrspace(1) %out) {
23-
; PASS-CHECK-LABEL: define amdgpu_kernel void @permlane64_undef(
24-
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
25-
; PASS-CHECK-NEXT: [[V:%.*]] = call i32 @llvm.amdgcn.permlane64.i32(i32 undef)
26-
; PASS-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
27-
; PASS-CHECK-NEXT: ret void
28-
;
29-
; DCE-CHECK-LABEL: define amdgpu_kernel void @permlane64_undef(
30-
; DCE-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
31-
; DCE-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
32-
; DCE-CHECK-NEXT: ret void
33-
;
34-
%v = call i32 @llvm.amdgcn.permlane64(i32 undef)
35-
store i32 %v, ptr addrspace(1) %out
36-
ret void
37-
}
38-
3922
define amdgpu_kernel void @permlane64_uniform(ptr addrspace(1) %out, i32 %src) {
4023
; PASS-CHECK-LABEL: define amdgpu_kernel void @permlane64_uniform(
4124
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], i32 [[SRC:%.*]]) #[[ATTR0]] {
@@ -121,23 +104,6 @@ define amdgpu_kernel void @readlane_constant(ptr addrspace(1) %out) {
121104
ret void
122105
}
123106

124-
define amdgpu_kernel void @readlane_undef(ptr addrspace(1) %out) {
125-
; PASS-CHECK-LABEL: define amdgpu_kernel void @readlane_undef(
126-
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
127-
; PASS-CHECK-NEXT: [[V:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 undef, i32 undef)
128-
; PASS-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
129-
; PASS-CHECK-NEXT: ret void
130-
;
131-
; DCE-CHECK-LABEL: define amdgpu_kernel void @readlane_undef(
132-
; DCE-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
133-
; DCE-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
134-
; DCE-CHECK-NEXT: ret void
135-
;
136-
%v = call i32 @llvm.amdgcn.readlane(i32 undef, i32 undef)
137-
store i32 %v, ptr addrspace(1) %out
138-
ret void
139-
}
140-
141107
define amdgpu_kernel void @readlane_nonuniform_indices(ptr addrspace(1) %out, i32 %src0, i32 %src1) {
142108
; PASS-CHECK-LABEL: define amdgpu_kernel void @readlane_nonuniform_indices(
143109
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], i32 [[SRC0:%.*]], i32 [[SRC1:%.*]]) #[[ATTR0]] {
@@ -232,23 +198,6 @@ define amdgpu_kernel void @readfirstlane_constant(ptr addrspace(1) %out) {
232198
ret void
233199
}
234200

235-
define amdgpu_kernel void @readfirstlane_undef(ptr addrspace(1) %out) {
236-
; PASS-CHECK-LABEL: define amdgpu_kernel void @readfirstlane_undef(
237-
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
238-
; PASS-CHECK-NEXT: [[V:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 undef)
239-
; PASS-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
240-
; PASS-CHECK-NEXT: ret void
241-
;
242-
; DCE-CHECK-LABEL: define amdgpu_kernel void @readfirstlane_undef(
243-
; DCE-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
244-
; DCE-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
245-
; DCE-CHECK-NEXT: ret void
246-
;
247-
%v = call i32 @llvm.amdgcn.readfirstlane(i32 undef)
248-
store i32 %v, ptr addrspace(1) %out
249-
ret void
250-
}
251-
252201
define amdgpu_kernel void @readfirstlane_with_argument(ptr addrspace(1) %out, i32 %src0) {
253202
; PASS-CHECK-LABEL: define amdgpu_kernel void @readfirstlane_with_argument(
254203
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], i32 [[SRC0:%.*]]) #[[ATTR0]] {
@@ -478,23 +427,6 @@ define amdgpu_kernel void @readfirstlane_random(ptr addrspace(1) %out) {
478427
ret void
479428
}
480429

481-
define amdgpu_kernel void @permlane64_invalid(ptr addrspace(1) %out) {
482-
; PASS-CHECK-LABEL: define amdgpu_kernel void @permlane64_invalid(
483-
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
484-
; PASS-CHECK-NEXT: [[UNDEF_V:%.*]] = call i32 @llvm.amdgcn.permlane64.i32(i32 undef)
485-
; PASS-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
486-
; PASS-CHECK-NEXT: ret void
487-
;
488-
; DCE-CHECK-LABEL: define amdgpu_kernel void @permlane64_invalid(
489-
; DCE-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {
490-
; DCE-CHECK-NEXT: store i32 undef, ptr addrspace(1) [[OUT]], align 4
491-
; DCE-CHECK-NEXT: ret void
492-
;
493-
%undef_v = call i32 @llvm.amdgcn.permlane64(i32 undef)
494-
store i32 %undef_v, ptr addrspace(1) %out
495-
ret void
496-
}
497-
498430
define amdgpu_kernel void @readlane_expression(ptr addrspace(1) %out) {
499431
; PASS-CHECK-LABEL: define amdgpu_kernel void @readlane_expression(
500432
; PASS-CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0]] {

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