@@ -7202,7 +7202,7 @@ static MachineInstr *fuseInst(MachineFunction &MF, unsigned Opcode,
72027202 return MIB;
72037203}
72047204
7205- static MachineInstr *MakeM0Inst (const TargetInstrInfo &TII, unsigned Opcode,
7205+ static MachineInstr *makeM0Inst (const TargetInstrInfo &TII, unsigned Opcode,
72067206 ArrayRef<MachineOperand> MOs,
72077207 MachineBasicBlock::iterator InsertPt,
72087208 MachineInstr &MI) {
@@ -7282,6 +7282,12 @@ MachineInstr *X86InstrInfo::foldMemoryOperandCustom(
72827282 }
72837283 }
72847284 break ;
7285+ case X86::MOV32r0:
7286+ if (auto *NewMI =
7287+ makeM0Inst (*this , (Size == 4 ) ? X86::MOV32mi : X86::MOV64mi32, MOs,
7288+ InsertPt, MI))
7289+ return NewMI;
7290+ break ;
72857291 }
72867292
72877293 return nullptr ;
@@ -7382,10 +7388,6 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
73827388 Size, Alignment))
73837389 return CustomMI;
73847390
7385- if (Opc == X86::MOV32r0)
7386- if (auto *NewMI = MakeM0Inst (*this , X86::MOV32mi, MOs, InsertPt, MI))
7387- return NewMI;
7388-
73897391 // Folding a memory location into the two-address part of a two-address
73907392 // instruction is different than folding it other places. It requires
73917393 // replacing the *two* registers with the memory location.
@@ -7483,6 +7485,10 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
74837485 for (auto Op : Ops) {
74847486 MachineOperand &MO = MI.getOperand (Op);
74857487 auto SubReg = MO.getSubReg ();
7488+ // MOV32r0 is special b/c it's used to clear a 64-bit register too.
7489+ // (See patterns for MOV32r0 in TD files).
7490+ if (MI.getOpcode () == X86::MOV32r0 && SubReg == X86::sub_32bit)
7491+ continue ;
74867492 if (SubReg && (MO.isDef () || SubReg == X86::sub_8bit_hi))
74877493 return nullptr ;
74887494 }
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