@@ -23,17 +23,17 @@ namespace llvm {
2323// / This analysis only keeps track and cares about super registers, not the
2424// / subregisters. All reads from/writes to subregisters are considered the
2525// / same operation to super registers.
26- inline bool isSuperReg (const MCRegisterInfo *MCRI, MCPhysReg Reg) {
26+ inline bool isSuperReg (const MCRegisterInfo *MCRI, MCRegister Reg) {
2727 return MCRI->superregs (Reg).empty ();
2828}
2929
3030inline SmallVector<MCPhysReg> getSuperRegs (const MCRegisterInfo *MCRI) {
3131 SmallVector<MCPhysReg> SuperRegs;
3232 for (auto &&RegClass : MCRI->regclasses ())
3333 for (unsigned I = 0 ; I < RegClass.getNumRegs (); I++) {
34- MCPhysReg Reg = RegClass.getRegister (I);
34+ MCRegister Reg = RegClass.getRegister (I);
3535 if (isSuperReg (MCRI, Reg))
36- SuperRegs.push_back (Reg);
36+ SuperRegs.push_back (Reg. id () );
3737 }
3838
3939 sort (SuperRegs.begin (), SuperRegs.end ());
@@ -49,7 +49,7 @@ inline SmallVector<MCPhysReg> getTrackingRegs(const MCRegisterInfo *MCRI) {
4949 return TrackingRegs;
5050}
5151
52- inline MCPhysReg getSuperReg (const MCRegisterInfo *MCRI, MCPhysReg Reg) {
52+ inline MCRegister getSuperReg (const MCRegisterInfo *MCRI, MCRegister Reg) {
5353 if (isSuperReg (MCRI, Reg))
5454 return Reg;
5555 for (auto SuperReg : MCRI->superregs (Reg))
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