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Reserve R9 on armv6 iOS 2.x (#150835)
The iOS 2.x ABI had R9 as a reserved register, 3.0 made it available, but support for the 2.x ABI was never added to LLVM. We only use the 2.x ABI on armv6 since before 3.0 armv6 was the only architecture supported by iOS.
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llvm/lib/Target/ARM/ARMSubtarget.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -225,7 +225,11 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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(isTargetDarwin() || DM == DenormalMode::getPreserveSign()))
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HasNEONForFP = true;
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if (isRWPI())
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const ARM::ArchKind Arch = ARM::parseArch(TargetTriple.getArchName());
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if (isRWPI() ||
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(isTargetIOS() &&
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(Arch == ARM::ArchKind::ARMV6K || Arch == ARM::ArchKind::ARMV6) &&
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TargetTriple.isOSVersionLT(3, 0)))
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ReserveR9 = true;
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// If MVEVectorCostFactor is still 0 (has not been set to anything else), default it to 2

llvm/test/CodeGen/ARM/inline-asm-clobber.ll

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,19 @@
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; RUN: llc <%s -mtriple=arm-none-eabi --frame-pointer=all 2>&1 \
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; RUN: | FileCheck %s -check-prefix=NO_FP_ELIM
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; RUN: llc <%s -mtriple=armv6-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS2
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; RUN: llc <%s -mtriple=armv6k-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS2
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; RUN: llc <%s -mtriple=armv6k-apple-ios3 2>&1 | FileCheck %s -check-prefix=IOS3
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; RUN: llc <%s -mtriple=armv7-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS3
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; CHECK: warning: inline asm clobber list contains reserved registers: SP, PC
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; CHECK: warning: inline asm clobber list contains reserved registers: R11
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; RWPI: warning: inline asm clobber list contains reserved registers: R9, SP, PC
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; RWPI: warning: inline asm clobber list contains reserved registers: R11
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; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11, SP, PC
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; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11
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; IOS2: warning: inline asm clobber list contains reserved registers: R9, SP, PC
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; IOS3: warning: inline asm clobber list contains reserved registers: SP, PC
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define void @foo() nounwind {
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call void asm sideeffect "mov r7, #1",

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