11; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2- ; RUN: opt < %s -passes=dse -S | FileCheck %s
2+ ; RUN: opt < %s -passes=dse -S | FileCheck %s --check-prefixes=CHECK,CHECK-MEM4
3+ ; RUN: opt < %s -mtriple=x86_64-unknown-unknown -passes=dse -S | FileCheck %s --check-prefixes=CHECK,CHECK-MEM16
34
45define void @write4to7 (ptr nocapture %p ) {
56; CHECK-LABEL: @write4to7(
@@ -23,8 +24,8 @@ define void @write4to7_weird_element_type(ptr nocapture %p) {
2324; CHECK-LABEL: @write4to7_weird_element_type(
2425; CHECK-NEXT: entry:
2526; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 1
26- ; CHECK-NEXT: [[TMP1 :%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 4
27- ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP1 ]], i8 0, i64 24, i1 false)
27+ ; CHECK-NEXT: [[TMP0 :%.*]] = getelementptr inbounds i8, ptr [[ARRAYIDX0]], i64 4
28+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0 ]], i8 0, i64 24, i1 false)
2829; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 1
2930; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX1]], align 4
3031; CHECK-NEXT: ret void
@@ -269,14 +270,23 @@ entry:
269270}
270271
271272define void @write8To15AndThen0To7 (ptr nocapture %P ) {
272- ; CHECK-LABEL: @write8To15AndThen0To7(
273- ; CHECK-NEXT: entry:
274- ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 16
275- ; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 8 [[TMP0]], i8 0, i64 16, i1 false)
276- ; CHECK-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 1
277- ; CHECK-NEXT: store i64 1, ptr [[BASE64_1]], align 4
278- ; CHECK-NEXT: store i64 2, ptr [[P]], align 4
279- ; CHECK-NEXT: ret void
273+ ; CHECK-MEM4-LABEL: @write8To15AndThen0To7(
274+ ; CHECK-MEM4-NEXT: entry:
275+ ; CHECK-MEM4-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 16
276+ ; CHECK-MEM4-NEXT: tail call void @llvm.memset.p0.i64(ptr align 8 [[TMP0]], i8 0, i64 16, i1 false)
277+ ; CHECK-MEM4-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 1
278+ ; CHECK-MEM4-NEXT: store i64 1, ptr [[BASE64_1]], align 4
279+ ; CHECK-MEM4-NEXT: store i64 2, ptr [[P]], align 4
280+ ; CHECK-MEM4-NEXT: ret void
281+ ;
282+ ; CHECK-MEM16-LABEL: @write8To15AndThen0To7(
283+ ; CHECK-MEM16-NEXT: entry:
284+ ; CHECK-MEM16-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 16
285+ ; CHECK-MEM16-NEXT: tail call void @llvm.memset.p0.i64(ptr align 8 [[TMP0]], i8 0, i64 16, i1 false)
286+ ; CHECK-MEM16-NEXT: [[BASE64_1:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 1
287+ ; CHECK-MEM16-NEXT: store i64 1, ptr [[BASE64_1]], align 8
288+ ; CHECK-MEM16-NEXT: store i64 2, ptr [[P]], align 8
289+ ; CHECK-MEM16-NEXT: ret void
280290;
281291entry:
282292
@@ -402,3 +412,131 @@ entry:
402412 store i64 1 , ptr %p , align 1
403413 ret void
404414}
415+
416+ define void @memset_optimize_size_lo_33_to_x86_32_generic_28 (ptr %p ) {
417+ ; CHECK-LABEL: @memset_optimize_size_lo_33_to_x86_32_generic_28(
418+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 3
419+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
420+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 5
421+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP1]], i8 0, i64 28, i1 false)
422+ ; CHECK-NEXT: store i64 0, ptr [[P1]], align 1
423+ ; CHECK-NEXT: ret void
424+ ;
425+ %p0 = getelementptr inbounds i8 , ptr %p , i64 3
426+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
427+ call void @llvm.memset.p0.i64 (ptr align 1 %p0 , i8 0 , i64 33 , i1 false )
428+ store i64 0 , ptr %p1 , align 1
429+ ret void
430+ }
431+
432+ define void @memset_optimize_size_lo_33_misaligned_x86_fail_generic_save_unit (ptr %p ) {
433+ ; CHECK-LABEL: @memset_optimize_size_lo_33_misaligned_x86_fail_generic_save_unit(
434+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 3
435+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
436+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 4
437+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 2 [[TMP1]], i8 0, i64 29, i1 false)
438+ ; CHECK-NEXT: store i64 0, ptr [[P1]], align 1
439+ ; CHECK-NEXT: ret void
440+ ;
441+ %p0 = getelementptr inbounds i8 , ptr %p , i64 3
442+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
443+ call void @llvm.memset.p0.i64 (ptr align 2 %p0 , i8 0 , i64 33 , i1 false )
444+ store i64 0 , ptr %p1 , align 1
445+ ret void
446+ }
447+
448+ define void @memset_optimize_size_lo_32_x86_misaligned_fail_generic_save_unit2 (ptr %p ) {
449+ ; CHECK-LABEL: @memset_optimize_size_lo_32_x86_misaligned_fail_generic_save_unit2(
450+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 4
451+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
452+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 4
453+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 2 [[TMP1]], i8 0, i64 28, i1 false)
454+ ; CHECK-NEXT: store i64 0, ptr [[P1]], align 1
455+ ; CHECK-NEXT: ret void
456+ ;
457+ %p0 = getelementptr inbounds i8 , ptr %p , i64 4
458+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
459+ call void @llvm.memset.p0.i64 (ptr align 2 %p0 , i8 0 , i64 32 , i1 false )
460+ store i64 0 , ptr %p1 , align 1
461+ ret void
462+ }
463+
464+ define void @memset_optimize_size_lo_34_to_32 (ptr %p ) {
465+ ; CHECK-LABEL: @memset_optimize_size_lo_34_to_32(
466+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 4
467+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
468+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 4
469+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 2 [[TMP1]], i8 0, i64 30, i1 false)
470+ ; CHECK-NEXT: store i64 0, ptr [[P1]], align 1
471+ ; CHECK-NEXT: ret void
472+ ;
473+ %p0 = getelementptr inbounds i8 , ptr %p , i64 4
474+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
475+ call void @llvm.memset.p0.i64 (ptr align 2 %p0 , i8 0 , i64 34 , i1 false )
476+ store i64 0 , ptr %p1 , align 1
477+ ret void
478+ }
479+
480+ define void @memset_optimize_size_lo_34_x86_misaligned_fail_generic_save_unit (ptr %p ) {
481+ ; CHECK-LABEL: @memset_optimize_size_lo_34_x86_misaligned_fail_generic_save_unit(
482+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 4
483+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
484+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 4
485+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP1]], i8 0, i64 30, i1 false)
486+ ; CHECK-NEXT: store i64 0, ptr [[P1]], align 1
487+ ; CHECK-NEXT: ret void
488+ ;
489+ %p0 = getelementptr inbounds i8 , ptr %p , i64 4
490+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
491+ call void @llvm.memset.p0.i64 (ptr align 4 %p0 , i8 0 , i64 34 , i1 false )
492+ store i64 0 , ptr %p1 , align 1
493+ ret void
494+ }
495+
496+ define void @memset_optimize_size_lo_34_to_32_no_align_okay (ptr %p ) {
497+ ; CHECK-LABEL: @memset_optimize_size_lo_34_to_32_no_align_okay(
498+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 4
499+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
500+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 4
501+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP1]], i8 0, i64 30, i1 false)
502+ ; CHECK-NEXT: store i64 0, ptr [[P1]], align 1
503+ ; CHECK-NEXT: ret void
504+ ;
505+ %p0 = getelementptr inbounds i8 , ptr %p , i64 4
506+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
507+ call void @llvm.memset.p0.i64 (ptr align 1 %p0 , i8 0 , i64 34 , i1 false )
508+ store i64 0 , ptr %p1 , align 1
509+ ret void
510+ }
511+
512+ define void @memset_optimize_size_lo_33_to_31_save_unit_no_change (ptr %p ) {
513+ ; CHECK-LABEL: @memset_optimize_size_lo_33_to_31_save_unit_no_change(
514+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1
515+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
516+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 2
517+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 2 [[TMP1]], i8 0, i64 31, i1 false)
518+ ; CHECK-NEXT: store i32 0, ptr [[P1]], align 1
519+ ; CHECK-NEXT: ret void
520+ ;
521+ %p0 = getelementptr inbounds i8 , ptr %p , i64 1
522+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
523+ call void @llvm.memset.p0.i64 (ptr align 2 %p0 , i8 0 , i64 33 , i1 false )
524+ store i32 0 , ptr %p1 , align 1
525+ ret void
526+ }
527+
528+ define void @memset_optimize_size_lo_36_to_32 (ptr %p ) {
529+ ; CHECK-LABEL: @memset_optimize_size_lo_36_to_32(
530+ ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 1
531+ ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 0
532+ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 4
533+ ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP1]], i8 0, i64 32, i1 false)
534+ ; CHECK-NEXT: store i64 0, ptr [[P1]], align 1
535+ ; CHECK-NEXT: ret void
536+ ;
537+ %p0 = getelementptr inbounds i8 , ptr %p , i64 1
538+ %p1 = getelementptr inbounds i8 , ptr %p , i64 0
539+ call void @llvm.memset.p0.i64 (ptr align 4 %p0 , i8 0 , i64 36 , i1 false )
540+ store i64 0 , ptr %p1 , align 1
541+ ret void
542+ }
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