CodeGen: Renamed CodeGenCommonTMImpl to CodeGenTargetMachineImpl. Link to RFC: https://discourse.llvm.org/t/rfc-reworking-the-targetmachine-interface/82478

Author: matinraayai

llvm/docs/WritingAnLLVMBackend.rst

@@ -152,7 +152,7 @@ To make your target actually do something, you need to implement a subclass of
 ``lib/Target/DummyTargetMachine.cpp``, but any file in the ``lib/Target``
 directory will be built and should work.  To use LLVM's target independent code
 generator, you should do what all current machine backends do: create a
-subclass of ``CodeGenCommonTMImpl``.  (To create a target from scratch, create a
+subclass of ``CodeGenTargetMachineImpl``.  (To create a target from scratch, create a
 subclass of ``TargetMachine``.)
 
 To get LLVM to actually build and link your target, you need to run ``cmake``
@@ -165,15 +165,15 @@ located in the main ``CMakeLists.txt``.
 Target Machine
 ==============
 
-``CodeGenCommonTMImpl`` is designed as a base class for targets implemented with
-the LLVM target-independent code generator.  The ``CodeGenCommonTMImpl`` class
+``CodeGenTargetMachineImpl`` is designed as a base class for targets implemented with
+the LLVM target-independent code generator. The ``CodeGenTargetMachineImpl`` class
 should be specialized by a concrete target class that implements the various
-virtual methods.  ``CodeGenCommonTMImpl`` is defined as a subclass of
-``TargetMachine`` in ``include/llvm/CodeGen/CodeGenCommonTMImpl.h``.  The
+virtual methods.  ``CodeGenTargetMachineImpl`` is defined as a subclass of
+``TargetMachine`` in ``include/llvm/CodeGen/CodeGenTargetMachineImpl.h``.  The
 ``TargetMachine`` class implementation (``include/llvm/Target/TargetMachine.cpp``)
 also processes numerous command-line options.
 
-To create a concrete target-specific subclass of ``CodeGenCommonTMImpl``, start
+To create a concrete target-specific subclass of ``CodeGenTargetMachineImpl``, start
 by copying an existing ``TargetMachine`` class and header.  You should name the
 files that you create to reflect your specific target.  For instance, for the
 SPARC target, name the files ``SparcTargetMachine.h`` and
@@ -197,7 +197,7 @@ simply return a class member.
 
   class Module;
 
-  class SparcTargetMachine : public CodeGenCommonTMImpl {
+  class SparcTargetMachine : public CodeGenTargetMachineImpl {
     const DataLayout DataLayout;       // Calculates type size & alignment
     SparcSubtarget Subtarget;
     SparcInstrInfo InstrInfo;

llvm/include/llvm/CodeGen/CodeGenCommonTMImpl.h renamed to llvm/include/llvm/CodeGen/CodeGenTargetMachineImpl.h

@@ -1,17 +1,17 @@
-//===-- CodeGenCommonTMImpl.h -----------------------------------*- C++ -*-===//
+//===-- CodeGenTargetMachineImpl.h ------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 ///
-/// \file This file describes the CodeGenCommonTMImpl class, which
+/// \file This file describes the CodeGenTargetMachineImpl class, which
 /// implements a set of functionality used by \c TargetMachine classes in
 /// LLVM that make use of the target-independent code generator.
 //===----------------------------------------------------------------------===//
-#ifndef LLVM_CODEGEN_CODEGENCOMMONTMIMPL_H
-#define LLVM_CODEGEN_CODEGENCOMMONTMIMPL_H
+#ifndef LLVM_CODEGEN_CODEGENTARGETMACHINEIMPL_H
+#define LLVM_CODEGEN_CODEGENTARGETMACHINEIMPL_H
 #include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
@@ -20,12 +20,12 @@ namespace llvm {
 /// for targets that make use of the independent code generator (CodeGen)
 /// library. Must not be used directly in code unless to inherit its
 /// implementation.
-class CodeGenCommonTMImpl : public TargetMachine {
+class CodeGenTargetMachineImpl : public TargetMachine {
 protected: // Can only create subclasses.
-  CodeGenCommonTMImpl(const Target &T, StringRef DataLayoutString,
-                      const Triple &TT, StringRef CPU, StringRef FS,
-                      const TargetOptions &Options, Reloc::Model RM,
-                      CodeModel::Model CM, CodeGenOptLevel OL);
+  CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString,
+                           const Triple &TT, StringRef CPU, StringRef FS,
+                           const TargetOptions &Options, Reloc::Model RM,
+                           CodeModel::Model CM, CodeGenOptLevel OL);
 
   void initAsmInfo();
 

llvm/lib/CodeGen/CMakeLists.txt

@@ -99,7 +99,7 @@ add_llvm_component_library(LLVMCodeGen
   LiveRegUnits.cpp
   LiveStacks.cpp
   LiveVariables.cpp
-  CodeGenCommonTMImpl.cpp
+  CodeGenTargetMachineImpl.cpp
   LocalStackSlotAllocation.cpp
   LoopTraversal.cpp
   LowLevelTypeUtils.cpp

llvm/lib/CodeGen/CodeGenCommonTMImpl.cpp renamed to llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp

@@ -1,16 +1,16 @@
-//===-- CodeGenCommonTMImpl.cpp - CodeGenCommonTMImpl implementation ------===//
+//===-- CodeGenTargetMachineImpl.cpp --------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 ///
-/// \file This file implements the CodeGenCommonTMImpl class.
+/// \file This file implements the CodeGenTargetMachineImpl class.
 ///
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
+#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/BasicTTIImpl.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
@@ -42,7 +42,7 @@ static cl::opt<bool> EnableNoTrapAfterNoreturn(
     cl::desc("Do not emit a trap instruction for 'unreachable' IR instructions "
              "after noreturn calls, even if --trap-unreachable is set."));
 
-void CodeGenCommonTMImpl::initAsmInfo() {
+void CodeGenTargetMachineImpl::initAsmInfo() {
   MRI.reset(TheTarget.createMCRegInfo(getTargetTriple().str()));
   assert(MRI && "Unable to create reg info");
   MII.reset(TheTarget.createMCInstrInfo());
@@ -85,7 +85,7 @@ void CodeGenCommonTMImpl::initAsmInfo() {
   AsmInfo.reset(TmpAsmInfo);
 }
 
-CodeGenCommonTMImpl::CodeGenCommonTMImpl(
+CodeGenTargetMachineImpl::CodeGenTargetMachineImpl(
     const Target &T, StringRef DataLayoutString, const Triple &TT,
     StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM,
     CodeModel::Model CM, CodeGenOptLevel OL)
@@ -101,13 +101,13 @@ CodeGenCommonTMImpl::CodeGenCommonTMImpl(
 }
 
 TargetTransformInfo
-CodeGenCommonTMImpl::getTargetTransformInfo(const Function &F) const {
+CodeGenTargetMachineImpl::getTargetTransformInfo(const Function &F) const {
   return TargetTransformInfo(BasicTTIImpl(this, F));
 }
 
 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
 static TargetPassConfig *
-addPassesToGenerateCode(CodeGenCommonTMImpl &TM, PassManagerBase &PM,
+addPassesToGenerateCode(CodeGenTargetMachineImpl &TM, PassManagerBase &PM,
                         bool DisableVerify,
                         MachineModuleInfoWrapperPass &MMIWP) {
   // Targets may override createPassConfig to provide a target-specific
@@ -125,11 +125,11 @@ addPassesToGenerateCode(CodeGenCommonTMImpl &TM, PassManagerBase &PM,
   return PassConfig;
 }
 
-bool CodeGenCommonTMImpl::addAsmPrinter(PassManagerBase &PM,
-                                        raw_pwrite_stream &Out,
-                                        raw_pwrite_stream *DwoOut,
-                                        CodeGenFileType FileType,
-                                        MCContext &Context) {
+bool CodeGenTargetMachineImpl::addAsmPrinter(PassManagerBase &PM,
+                                             raw_pwrite_stream &Out,
+                                             raw_pwrite_stream *DwoOut,
+                                             CodeGenFileType FileType,
+                                             MCContext &Context) {
   Expected<std::unique_ptr<MCStreamer>> MCStreamerOrErr =
       createMCStreamer(Out, DwoOut, FileType, Context);
   if (auto Err = MCStreamerOrErr.takeError())
@@ -145,9 +145,11 @@ bool CodeGenCommonTMImpl::addAsmPrinter(PassManagerBase &PM,
   return false;
 }
 
-Expected<std::unique_ptr<MCStreamer>> CodeGenCommonTMImpl::createMCStreamer(
-    raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
-    MCContext &Context) {
+Expected<std::unique_ptr<MCStreamer>>
+CodeGenTargetMachineImpl::createMCStreamer(raw_pwrite_stream &Out,
+                                           raw_pwrite_stream *DwoOut,
+                                           CodeGenFileType FileType,
+                                           MCContext &Context) {
   const MCSubtargetInfo &STI = *getMCSubtargetInfo();
   const MCAsmInfo &MAI = *getMCAsmInfo();
   const MCRegisterInfo &MRI = *getMCRegisterInfo();
@@ -206,7 +208,7 @@ Expected<std::unique_ptr<MCStreamer>> CodeGenCommonTMImpl::createMCStreamer(
   return std::move(AsmStreamer);
 }
 
-bool CodeGenCommonTMImpl::addPassesToEmitFile(
+bool CodeGenTargetMachineImpl::addPassesToEmitFile(
     PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
     CodeGenFileType FileType, bool DisableVerify,
     MachineModuleInfoWrapperPass *MMIWP) {
@@ -236,10 +238,10 @@ bool CodeGenCommonTMImpl::addPassesToEmitFile(
 /// code is not supported. It fills the MCContext Ctx pointer which can be
 /// used to build custom MCStreamer.
 ///
-bool CodeGenCommonTMImpl::addPassesToEmitMC(PassManagerBase &PM,
-                                            MCContext *&Ctx,
-                                            raw_pwrite_stream &Out,
-                                            bool DisableVerify) {
+bool CodeGenTargetMachineImpl::addPassesToEmitMC(PassManagerBase &PM,
+                                                 MCContext *&Ctx,
+                                                 raw_pwrite_stream &Out,
+                                                 bool DisableVerify) {
   // Add common CodeGen passes.
   MachineModuleInfoWrapperPass *MMIWP = new MachineModuleInfoWrapperPass(this);
   TargetPassConfig *PassConfig =

llvm/lib/CodeGen/TargetPassConfig.cpp

@@ -22,7 +22,7 @@
 #include "llvm/Analysis/TypeBasedAliasAnalysis.h"
 #include "llvm/CodeGen/BasicBlockSectionsProfileReader.h"
 #include "llvm/CodeGen/CSEConfigBase.h"
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
+#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/Passes.h"
@@ -621,7 +621,8 @@ void TargetPassConfig::insertPass(AnalysisID TargetPassID,
 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
 ///
 /// Targets may override this to extend TargetPassConfig.
-TargetPassConfig *CodeGenCommonTMImpl::createPassConfig(PassManagerBase &PM) {
+TargetPassConfig *
+CodeGenTargetMachineImpl::createPassConfig(PassManagerBase &PM) {
   return new TargetPassConfig(*this, PM);
 }
 

llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

@@ -356,7 +356,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT,
                                            std::optional<CodeModel::Model> CM,
                                            CodeGenOptLevel OL, bool JIT,
                                            bool LittleEndian)
-    : CodeGenCommonTMImpl(
+    : CodeGenTargetMachineImpl(
           T, computeDataLayout(TT, Options.MCOptions, LittleEndian), TT,
           computeDefaultCPU(TT, CPU), FS, Options,
           getEffectiveRelocModel(TT, RM),

llvm/lib/Target/AArch64/AArch64TargetMachine.h

@@ -15,13 +15,13 @@
 
 #include "AArch64InstrInfo.h"
 #include "AArch64Subtarget.h"
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
+#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
 #include "llvm/IR/DataLayout.h"
 #include <optional>
 
 namespace llvm {
 
-class AArch64TargetMachine : public CodeGenCommonTMImpl {
+class AArch64TargetMachine : public CodeGenTargetMachineImpl {
 protected:
   std::unique_ptr<TargetLoweringObjectFile> TLOF;
   mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -660,7 +660,7 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
                                          std::optional<Reloc::Model> RM,
                                          std::optional<CodeModel::Model> CM,
                                          CodeGenOptLevel OptLevel)
-    : CodeGenCommonTMImpl(
+    : CodeGenTargetMachineImpl(
           T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU), FS, Options,
           getEffectiveRelocModel(RM),
           getEffectiveCodeModel(CM, CodeModel::Small), OptLevel),

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h

@@ -15,7 +15,7 @@
 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
 
 #include "GCNSubtarget.h"
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
+#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/Passes/CodeGenPassBuilder.h"
@@ -28,7 +28,7 @@ namespace llvm {
 // AMDGPU Target Machine (R600+)
 //===----------------------------------------------------------------------===//
 
-class AMDGPUTargetMachine : public CodeGenCommonTMImpl {
+class AMDGPUTargetMachine : public CodeGenTargetMachineImpl {
 protected:
   std::unique_ptr<TargetLoweringObjectFile> TLOF;
 

llvm/lib/Target/ARC/ARCTargetMachine.h

@@ -14,14 +14,14 @@
 #define LLVM_LIB_TARGET_ARC_ARCTARGETMACHINE_H
 
 #include "ARCSubtarget.h"
-#include "llvm/CodeGen/CodeGenCommonTMImpl.h"
+#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
 #include <optional>
 
 namespace llvm {
 
 class TargetPassConfig;
 
-class ARCTargetMachine : public CodeGenCommonTMImpl {
+class ARCTargetMachine : public CodeGenTargetMachineImpl {
   std::unique_ptr<TargetLoweringObjectFile> TLOF;
   ARCSubtarget Subtarget;