Commit 13974a9
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[RISCV] Add @earlyclobber to SiFive custom matrix multiply instruction.
All of these have a constraint that vd and vs1 cannot overlap.
Some of them have an additional widening constraint for vs2.
We should use earlyclobber to protect this.
This is unlikely to be an issue in practice due to the instrinsic
being ternary so vd is also a source. The intrinsic has a different
type for this source than the other sources. You would have to do
something crazy to get the register allocator to overlap the registers.1 parent 7575072 commit 13974a9
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